Apparatus and method for electrolytically depositing copper on a semiconductor workpiece

The process of claim/wherein the complexing agent is comprised of ED and wherein the ED in the electrolytic bath has a concentration within the range of 0.03 to 1.0 M.

In a manufacturing line including a plurality of apparatus for the manufacture of integrated circuits, one or more apparatus of the plurality of apparatus being used for applying a copper metallization interconnect structure to a surface of a semiconductor workpiece used to form the integrated circuits, the one or more apparatus comprising:

• means for applying a conductive ultra-thin seed layer to a surface of the semiconductor workpiece;
• means for electrochemically enhancing the conductive ultra-thin seed layer to render it suitable for subsequent electrochemical application of the copper interconnect metallization to a predetermined thickness representing a bulk portion of the copper interconnect metallization structure.

One or more apparatus as claimed in claims wherein the complexing agent is citric acid or salt thereof.

A process for applying a metallization interconnect structure to a semiconductor workpiece, the workpiece including a barrier layer deposited on a surface thereof, the process comprising the steps of:

• (a) forming an ultra-thin metal seed layer on the barrier layer, the seed layer having a thickness of less than or equal to about 500 Angstroms;
• (b) subjecting the semiconductor workpiece to an electrochemical copper deposition process in an alkaline electrolytic bath having copper ions complexed with a complexing agent such that additional copper is deposited on the ultra-thin copper seed layer to thereby enhance the seed layer.

A semiconductor workpiece comprising:

• a plurality of the recessed structures distributed in a face of the semiconductor workpiece;
• an enhanced seed layer having a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.

A semiconductor workpiece as claimed in claim 48 wherein the thickness of the sidewalls of substantially all recessed features is equal to or greater than about 20%.