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US 2003/0154434 A1Published application
Self testing-and-repairing data buffer and method for operating the same
OwnerChien-Tzu Houinventor
Life of this patent
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OwnerChien-Tzu Houinventor
Estimating the term…
A self testing-and-repairing data buffer and method for operating the same are disclosed. The data buffer comprises a plurality of flip flops, a multiplexer, a test platform, a repair unit, and a buffer rearrange manager. The test platform generates test signals for checking each flip flop. If any damage is found, the repair unit is used to replace the damage flip flops for storing data. The buffer rearrange manager rearranges the address of the damage flip flops to the repair unit so that the data buffer can be operated normally. By the circuit layout and the precise calculation about time delay, the gated clock signal not used currently is used to form the working frequency of the flip flops of the data buffer so as to reduce the power as the IC is inoperative. Furthermore, the area of the data buffer and number of gates are reduced greatly.
A self testing-and-repairing data buffer, wherein while a system is boot up and the control is not yet transferred to an operation system, a test platform is activated for testing data buffers and it is repaired as faults occurs, the data buffer comprising:
The self testing-and-repairing data buffer as claimed in claim 10, wherein the output of the logic gate is used as a selection control signal of a multiplexer of next data buffer, so that as the previous data buffer or net is damaged, the multiplexer is confined only to select the output data from the previous data buffer for forming a network type repairing.
A method for operation a self testing-and-repairing data buffer, wherein the self-test is performed each time the system is started and then a test mode signal is generated, comprising the steps of:
Dependencies are inferred from the claim text.