Multiplex bus system with duty cycle correction
AssigneeSemiconductor Components Industries, LLC
InventorGeert Maria Marcel Vandensande
Life of this patent
Estimating the term…
Abstract
The present invention is related to a method for treating a digital signal within a protocol handler which is part of a module coupled to a multiplex bus. The method consists in detecting the duty cycle of the digital signal, and in modifying said digital signal so that the modified signal contains the same data, but has a duty cycle of approximately 50%.
Claims8
A transmission system comprising a data bus (1), and a plurality of modules (2) coupled to said data bus, said modules comprising a transceiver (4), a Medium Access Control device (7) used at least for sampling an incoming signal, a supervisor device (8) used at least for determining a sampling frequency and producing a sample signal (38) at said frequency, an oscillator (10),
- wherein in at least one of said modules, said supervisor device (8) further comprises, a duty cycle determining device (100) adapted to determine the duty cycle of said incoming signal and said Medium Access Control device (7) comprises a duty-cycle correcting device (101) adapted to correct said duty cycle thereby producing a corrected signal (44).
Method for processing a signal, said method comprising the steps of:
- transforming said signal into a first block wave (30;21 to 24), representing a sequence of high and low states, a high state corresponding to a first binary value, a low state corresponding to a second binary value,
- sampling said first block wave with a first sample signal (35) having a sample period equal to Δt,
- deriving from at least a part of said first block wave, the duty cycle of said first block wave,
- producing a second block wave (44), which represents the same sequence of high and low states as said first block wave, and wherein at least a part of said second block wave has a duty cycle close to 50%,
- sampling said second block wave with a second sample signal (38),
- applying further steps of treating said block wave (44) including the step of decoding said message.
A module intended to be coupled to a digital data bus (1), said module comprising a transceiver (4), a Medium Access Control device (7) used at least for sampling an incoming signal, a supervisor device (8) used at least for determining a sampling frequency and producing a sample signal (38) at said frequency, an oscillator (10), wherein said supervisor device (8) further comprises a duty-cycle determining device (100) adapted to determine the duty cycle of said incoming signal and said device (7) used for sampling a signal, comprises a correcting device (101) adapted to correct said duty cycle to thereby produce a corrected signal (44).
Dependencies are inferred from the claim text.