Apparatus and method for dispatching very long instruction word having variable length

A method for dispatching a very long instruction word (VLIW) instruction in a VLIW processor having a plurality of functional units (FUs), the method comprising the steps of:

• (a) loading VLIW instructions to a packet buffer;
• (b) generating a new VLIW instruction based on sub-instructions of the VLIW instructions stored in the packet buffer to be executed and decoding predetermined bits of each sub-instruction of the VLIW instruction;
• and
• (c) selecting FUs which correspond to each sub-instruction in response to results of the decoding performed in step (b), position information on the sub-instructions that are placed on the packet butter, and position information on the sub-instructions of a newly arranged VLIW instruction.

A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for dispatching a very long instruction word (VLIW) in a VLIW processor having a plurality of functional units (FUs), the program storage device further comprising instructions for:

• storing at least one or more VLIW instruction;
• generating a new VLIW instruction based on, sub-instructions of the VLIW instructions stored in the packet buffer to be executed;
• decoding predetermined bits of each sub-instruction of the VLIW instruction;
• and
• selecting FUs which correspond to each sub-instruction in response to results of the decoding performed, position information on the sub-instructions that are placed on the packet butter, and position information on the sub-instructions of a newly arranged VLIW instruction.