Digital signal processor system
AssigneeOki Electric Industry Co., Ltd.
InventorsHiroki Goko, Fumihiro Wajima, Yuji Fujiki, Junichi Tamura, Ali Elhadri, Nobuyuki Endo
Life of this patent
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Abstract
A digital signal processor includes a programmable memory, a processor and an access controller. The programmable memory has blocks each of which is capable of reading and writing an instruction of a program. The processor sequentially executes the instruction stored in the programmable memory. The access controller sequentially stores the instruction of the program in the blocks of the programmable memory on the basis of an address indicating a location of the respective blocks where the instruction is stored. The access controller controls an access of the processor to the respective blocks.
Claims19
A digital signal processor comprising:
- a programmable memory having a plurality of blocks each of which is capable of reading and writing an instruction of a program;
- a processor for sequentially executing the instruction stored in the programmable memory;
- and
- an access controller for sequentially storing the instruction of the program in the blocks of the programmable memory on the basis of an address indicating a location of the respective blocks where the instruction is stored, the access controller controlling an access of the processor to the respective blocks.
A digital signal processor comprising:
- a programmable memory for storing data including an instruction of a program, the programmable memory having a first port and a second port;
- an access control circuit connected to the first port of the programmable memory, the access control circuit writing the data into the programmable memory and outputting a completion signal and a wait signal;
- a clock control circuit connected to the access control circuit, the clock control circuit outputting a DSP clock in response to the completion signal and the wait signal;
- and
- a DSP connected to the access control circuit, the clock control circuit and the second port of the programmable memory, the DSP operating when the DSP clock is received from the clock control circuit, the DSP reading the data stored in the programmable memory.
Dependencies are inferred from the claim text.