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US 2003/0154332 A1Published application
Scheduler system and method
AssigneeTexas Instruments Incorporated
InventorChristopher Tserng
Life of this patent
Estimating the term…
Abstract
Multiple coprocessor scheduling of parallel processing steps control with bit arithmetic.
Claims3
A method of scheduling processes among coprocessors, comprising:
- (a) providing a first bitmask indicating a process step for a first data block, and a second bitmask indicating a process step for a second data block;
- (b) providing a third bitmask indicating coprocessor availability;
- and
- (c) combining said first, second, and third bitmasks to determine coprocessor utilization.
1 more element
A coprocessor system, comprising:
- (a) a plurality of coprocessors in communication;
- (b) a plurality of memories coupled to said coprocessors;
- and
- (c) a scheduler coupled to said coprocessors and memories, said scheduler including (i) a plurality of memory bitmasks, each of said memory bitmasks indicating a process step for one of said memories, (ii) a coprocessor bitmask indicating availability of said coprocessors, and (iii) a controller for combining said bitmasks to determine coprocessor utilization.
1 more element
Dependencies are inferred from the claim text.