Coding and decoding system and method for high-speed data transmission
OwnerRyan C. Johnsoninventor
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OwnerRyan C. Johnsoninventor
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This document discusses high speed data communication systems and methods, such as for communicating symbols using pulse-amplitude-modulated (PAM) or other multilevel (i.e., more than two) signal levels (e.g., PAM5 symbols using five signal levels). One example encodes and/or decodes between n-bit blocks of binary data (e.g., n=12) and m-symbol code words (e.g., m=6 PAM5 symbols). In this example, the code words are selected to limit the runlength of consecutive symbols transmitted without a symmetric-about-baseline transition between signal levels. In another example, the code words bound a word disparity representing a cumulative deviation from baseline of the values of the symbols of the code words. In a further example, the code words bound an intraword disparity representing a symbol-by-symbol cumulative deviation from baseline, within the code word. Symmetric code words with the same amount, but opposite signs, of nonzero word disparity are paired and together mapped to a unique code of the n-bit block of binary data. During communication, a running disparity is computed, and the code word of the pair that will reduce the running disparity is communicated. Word boundaries are discerned by communicating a nondata control word. In one example, the code or control words are selected to improve immunity to single symbol transmission error. In another example, error checking is performed using the word and running disparities.
A data communication method including:
A data communication apparatus including an encoder, the encoder including a map circuit, the map circuit including a first input configured to receive an n-bit block of binary data, and a first output configured to provide a representation of at least one corresponding m-symbol code word stored in the map, each of the m-symbols in the code word including at least five possible values, each code word including:
A data communication apparatus including a decoder, the decoder including a decoder input and a decoder logic map circuit, the map circuit including a first input configured to receive a representation of an m-symbol code word, the map circuit configured to map the m-symbol code word to an n-bit block of binary data provided at a first output of the map circuit, each of the m-symbols in the code word including at least five possible values, each code word including:
Dependencies are inferred from the claim text.