Synchronization detection circuit
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorToshiaki Matsumoto
Life of this patent
Estimating the term…
Abstract
A synchronization detection circuit comprises: a matched filter 105 for outputting a correlation value, between a spreading code and data that is obtained by sampling a code spread signal 101, using a sampling clock for one chip cycle; a sampling clock generator 102 for generating the sampling clock, so that, for each cycle of a code spreading signal, a phase delay for the basic clock of one chip cycle is increased by a value obtained by dividing one chip cycle by an integer; and a synchronization determination unit 107 for determining the timing whereat the maximum correlation value is attained and for performing synchronization detection.
Claims8
A synchronization detection circuit comprising:
- a matched filter for outputting a correlation value between a spreading code and data that is obtained by sampling a code spread signal using a one chip cycle sampling clock;
- a sampling clock generator for generating said sampling clock by sequentially changing the phase for each predetermined phase period provided by a reference clock for a one chip cycle;
- and
- a synchronization determination unit for determining the timing whereat the maximum for said correlation value is attained, and for detecting synchronization.
Dependencies are inferred from the claim text.