Low cost DSSS communication system

A method for generating a modulation sequence from a data value having a value ±1 in a direct sequence spread spectrum transmitter, said method comprising:

• generating a pseudo-noise sequence C=(C1, C2, C3, . . . , CN);
• up-sampling the pseudo-noise sequence by a factor of two to obtain a first sequence (C1, 0, C2, 0, C3, 0 , . . . , 0, CN,0);
• delaying the first sequence to give a second sequence (0, C1, 0, C2, 0, C3, 0, . . . , 0, CN);
• multiplying said second sequence by the data value to obtain a third sequence;
• and
• adding said first and third sequences to obtain said modulation signal.

A method for generating a modulation sequence from a data value in a direct sequence spread spectrum transmitter, said method comprising:

• generating a pseudo-noise sequence C=(C1, C2, C3, . . . , CN) of length N, where Ci=±1;
• generating an interleaved code sequence Cb by interleaving groups of M chips from the pseudo-noise sequence C and the pseudo noise sequence −C as
• Cb(2jM+i)=C(jM+i)Cb((2j+1)M+i)=−C(jM+i),
• where j=0, . . . , N/M−1 and i=1, . . . , M;
• and
• selecting said modulation sequence as said pseudo-noise sequence or said interleaved sequence according to the data value.

A method for recovering a data value from a received signal in a direct sequence spread spectrum receiver, said received signal having a chip period Tc, a bit period Tb and being modulated by first code sequence Ca or second code sequence Cb generated by interleaving groups of M chips from a pseudo-noise sequence C=(C1, C2, C3, . . . , CN) of length N with elements Ci=±1, said first code sequence Ca having elements

• Ca(2jM+i)=C(jM+i)Ca((2j+1)M+i)=C(jM+i)
• and said second code sequence Cb having elements
• Cb(2jM+i)=C(jM+i)Cb((2j+1)M+i)=−C(jM+i)
• where j=0, . . . , N/M−1 and i=1, . . . , M;
• said method comprising:
• transforming said received signal to complex baseband signal having in-phase and quadrature components;
• delaying said complex baseband signal by a time MTc equal to M chip periods to obtain a complex delayed signal;
• multiplying the complex baseband signal by the conjugate of the complex delayed signal to obtain a complex product signal;
• integrating the real part of said complex product signal over the bit period Tb to obtain an integrated value;
• and
• determining said data value from said integrated value.

A method for recovering a data value from a received signal in a direct sequence spread spectrum receiver, said received signal having a chip period Tc, a bit period Tb and being modulated by a code C=(C1, C2, C3, . . . , CN) or a code sequence Cb=(C1, −C1, C2, −C2, C3, −C3, . . . , CN, −CN), where Ci=±1 and C is a pseudo-noise sequence, said method comprising:

• transforming said received signal to complex baseband signal having in-phase and quadrature components;
• delaying said complex baseband signal by a time equal to the chip period Tc;
• to obtain a complex delayed signal;
• multiplying the complex baseband signal by the conjugate of the complex delayed signal to obtain a complex product signal;
• integrating the real part of said complex product signal over the bit period Tb to obtain an integrated value;
• and
• determining said data value from said integrated value.

A direct sequence spread spectrum transmitter for generating a modulation sequence from a data value, said transmitter comprising:

• means for generating a first code sequence Ca having elements
• Ca(2jM+i)=C(jM+i)Ca((2j+1)M+i)=C(jM+i)
• where C=(C1, C2, C3, . . . , CN) is a pseudo-noise sequence of length N with elements Ci=±1, j=0, . . . , N/M−1, i=1, . . . , M and M<N is an integer;
• means for generating a second code sequence Cb having elements
• Cb(2jM+i)=C(jM+i)Cb((2j+1)M+i)=−C(jM+i);
• means for selecting said modulation sequence as said first or second sequence according to the data value.

A direct sequence spread spectrum transmitter for generating a modulation sequence from a data value having a value ±1, said transmitter comprising:

• a pseudo-noise generator for generating a sequence C=(C1, C2, C3, . . . , CN);
• an up-sampler for up-sampling the pseudo-noise sequence by a factor of two to obtain a first sequence (C1, 0, C2, 0, C3, 0, . . . 0, CN,0);
• a delay element for delaying the first sequence to give a second sequence (0, C1, 0, C2, 0, C3, 0, . . . , 0, CN);
• a multiplier for multiplying said second sequence by the data value to obtain a third sequence;
• and
• an adder for adding said first and third sequences to obtain said modulation signal.

A direct sequence spread spectrum transmitter for generating a modulation sequence from a data value, said transmitter comprising:

• pseudo-noise generator for generating a pseudo-noise sequence C=(C1, C2, C3, . . . , CN) where Ci=±1;
• means for generating an interleaved code sequence Cb having elements
• Cb(2jM+i)=C(jM+i)Cb((2j+1)M+i)=−C(jM+i);
• where C=(C1, C2, C3, . . . , CN) is a pseudo-noise sequence of length N with elements Ci=±1, j=0, . . . , N/M−1, . . . , M and M<N is an integer;
• and
• means for selecting said modulation sequence as said pseudo-noise sequence or said interleaved sequence according to the data value.

A direct sequence spread spectrum receiver for recovering a data value from a received signal in a direct sequence spread spectrum receiver, said received signal having a chip period Tc, a bit period Tb and being modulated by first code sequence Ca or second code sequence Cb generated by interleaving groups of M chips from a pseudo-noise sequence C=(C1, C2, C3, . . . , CN) of length N with elements Ci=±1, said second code sequence Cb having elements

• Cb(2jM+i)=C(jM+i)Cb((2j+1)M+i)=−C(jM+i)
• where j=0, . . . , N/M−1 and i=1, . . . , M;
• said receiver comprising:
• a converter operable to transform said received signal to a complex baseband signal having in-phase and quadrature components;
• a delay element operable to delay said complex baseband signal by a time MTc, equal to M chip periods, to obtain a complex delayed signal;
• a multiplier operable to multiply the complex baseband signal by the conjugate of the complex delayed signal to obtain a complex product signal;
• an integrator operable to integrate the real part of said complex product signal over the bit period Tb to obtain an integrated value;
• and
• a decision logic circuit operable to determine said data value from said integrated value.