System for verifying operations of system LSI
AssigneeSony Computer Entertainment Inc.
InventorDaisuke Hiraoka
Life of this patent
Estimating the term…
Abstract
A multiplexing processor multiplexes internal signals of a system LSI to be verified at a clock rate higher than that of the internal bus lines of the system LSI so as to create a multiplexed internal signal to be output. Thus, internal signals on target bus lines can be taken out of the system LSI using a small number of signal lines. Therefore, without considerably increasing the number of output terminals of the system LSI, the internal signals can be taken out through the smallest number of additional output terminals. This results in an easy verifying process for the entire operation of the system LSI without the need for a complicated design of the system LSI or an increase in cost of the system LSI.
Claims23
A verifying system, comprising:
- a semiconductor integrated circuit including a number of circuit blocks connected through bus lines and a multiplexing unit operable to multiplex electric signals being transmitted on the bus lines to be output;
- a demultiplexing unit operable to demultiplex the multiplexed electric signals output from the multiplexing unit;
- and
- an analyzing unit operable to analyze an operation of the semiconductor integrated circuit on the basis of the electric signals demultiplexed by the demultiplexing unit.
A semiconductor integrated circuit, comprising:
- a number of circuit blocks connected through bus lines;
- and
- a multiplexing unit operable to multiplex electric signals being transmitted on the bus lines to be output.
A method for verifying a semiconductor integrated circuit, comprising:
- multiplexing electric signals being transmitted on bus lines connecting between circuit blocks in a semiconductor integrated circuit, to be taken out of the semiconductor integrated circuit;
- demultiplexing the multiplexed electric signals taken out of the semiconductor integrated circuit;
- and
- analyzing an operation of the semiconductor integrated circuit on the basis of the demultiplexed electric signals.
A computer-readable storage medium having recorded thereon a program to be executed on a computer for verifying a semiconductor integrated circuit, the verifying program comprising:
- multiplexing electric signals being transmitted on bus lines connecting between circuit blocks in a semiconductor integrated circuit, to be taken out of the semiconductor integrated circuit;
- demultiplexing the multiplexed electric signals taken out of the semiconductor integrated circuit;
- and
- analyzing an operation of the semiconductor integrated circuit on the basis of the demultiplexed electric signals.
A system for verifying a semiconductor integrated circuit, comprising:
- a processor for executing instructions;
- and
- instructions, the instructions including:
- multiplexing electric signals being transmitted on bus lines connecting between circuit blocks in a semiconductor integrated circuit, to be taken out of the semiconductor integrated circuit;
- demultiplexing the multiplexed electric signals taken out of the semiconductor integrated circuit;
- and
- analyzing an operation of the semiconductor integrated circuit on the basis of the demultiplexed electric signals.
A verifying system, comprising:
- a semiconductor integrated circuit including a number of circuit blocks connected through bus lines and multiplexing means for multiplexing electric signals being transmitted on the bus lines to be output;
- demultiplexing means for demultiplexing the multiplexed electric signals output from the multiplexing means;
- and
- analyzing means for analyzing an operation of the semiconductor integrated circuit on the basis of the electric signals demultiplexed by the demultiplexing means.
A semiconductor integrated circuit, comprising:
- a number of circuit blocks connected through bus lines;
- and
- multiplexing means for multiplexing electric signals being transmitted on the bus lines to be output.
Dependencies are inferred from the claim text.