Semiconductor integrated circuit device
AssigneeHitachi, Ltd.
InventorsMasahiko Tomizawa, Masahiko Nishiyama
Life of this patent
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Abstract
A semiconductor integrated circuit device comprises a control unit for switching a mode about the trimming or estimation in an internal circuit, the control unit including a controller capable of realizing the mode switching control about the trimming or estimation by the JTAG method. The controller includes an instruction decoder for decoding an input instruction, a shift scan register circuit for enabling a boundary scan based on the decoded result of the instruction decoder, and an operation controller for controlling the operations of the instruction decoder and the shift scan register circuit. Therefore, the trimming becomes possible after sealing a semiconductor chip into a package.
Claims7
A semiconductor integrated circuit device including an internal circuit and a control circuit for controlling the internal circuit, wherein
- the control circuit comprises a controller capable of realizing by using a terminal defined by JTAG, at least, one of the following modes:
- a first mode capable of adjusting an internal voltage level that is an operating voltage of the internal circuit;
- a second mode capable of adjusting an internal voltage level at a test;
- a third mode capable of adjusting a pulse width of a word line selecting signal or a column selecting signal for selecting a memory cell included in the internal circuit;
- a fourth mode capable of adjusting a timing for activating a sense amplifier included in the internal circuit;
- a fifth mode capable of adjusting a pulse signal for selecting a word line or a column for selecting a memory cell included in the internal circuit, according to a clock signal;
- a sixth mode capable of adjusting a timing for equalizing a data bus for reading out data in the internal circuit;
- a seventh mode capable of controlling an impedance of data output in the internal circuit;
- an eighth mode capable of adjusting rising characteristic or falling characteristic of data supplied from an output circuit included in the internal circuit;
- a ninth mode capable of switching a simultaneous output bit structure of the data in the internal circuit;
- and
- a tenth mode capable of turning a register for data output in the internal circuit into a slew state.
A semiconductor integrated circuit device including an internal circuit and a control circuit for controlling the internal circuit, wherein
- the control circuit comprises a controller capable of realizing a switching control of a mode for adjusting the internal circuit by using a terminal defined by JTAG;
- the controller includes an instruction decoder for decoding an input instruction,
- a shift scan register circuit for enabling a boundary scan operation based on the decoded result in the instruction decoder, and
- an operation controller for controlling the operations of the instruction decoder and the shift scan register circuit, and
- the shift scan register circuit includes a register capable of information settings for switching a mode for adjusting the internal circuit.
Dependencies are inferred from the claim text.