Semiconductor nonvolatile memory for performing read operations while performing write operations

A semiconductor nonvolatile memory in which read operations are carried out during write operations, comprising:

• a power supply pad and a ground pad to which power supply voltage and ground voltage are supplied, respectively;
• a core having a plurality of core cell transistors which have gate voltage/drain current characteristic corresponding to stored data;
• a reference cell transistor for write verify which has gate voltage/drain current characteristic corresponding to the verify level;
• a write verify circuit for detecting change in the characteristic of said core cell transistor by detecting the difference in potential between a first node on a current path connecting said power supply pad, a core cell transistor, and ground pad, and a second node on a current path connecting said power supply pad, reference cell transistor, and ground pad, during a write operation in which the gate voltage/drain current characteristic of said cell transistor is changed to a condition corresponding to stored data by injecting or extracting a charge into or from said core cell transistor;
• and
• a write verify inhibition signal generation circuit for generating a write verify inhibition signal in order to deactivate said write verify circuit during a read operation to said core cell transistor.