US 2003/0151950 A1 · Non-volatile semiconductor memory device

Abstract

The number of times of rewriting of memory cells is stored by number of rewrite (EW) times storage section. In data rewriting to memory cells, number of rewriting times data of a selected memory cell is transferred to and latched in a number of EW times sense latch section and transferred to a number of EW times counter. Controlling processor (CPU) sets a condition on a write pulse on the basis of a value obtained by updating a count value of the number of EW times counter and controls the operation of rewriting. In data rewriting, a count value after update of the number of EW times counter is transferred to the number of EW times sense latch section. The updated number of rewritings is transferred to a corresponding number of EW times storage section, in parallel to data rewriting to a memory cell. With such a construction, rewrite time of a non-volatile semiconductor memory device can be reduced and degradation in reliability of a tunnel insulating film of a non-volatile memory cell can be suppressed.

Claims17

Dependent claims

A non-volatile semiconductor memory device comprising:

a plurality of memory cells each for storing data in a non-volatile manner;
a number of times of rewriting storage circuit for storing the number of times of rewriting of storage data of said plurality of memory cells;
and
a rewrite condition control circuit for setting a condition of a rewrite pulse including at least one of a write pulse for writing data and an erase pulse for erasing storage data in accordance with the number of times of rewriting indicated by storage data in said number of times of rewriting storage circuit in data rewriting of the memory cell, a condition for said at least one of said write pulse and said erase pulse in said rewrite pulse being alterable in accordance with the number of times of rewriting.

1 more element

Dependencies are inferred from the claim text.

Non-volatile semiconductor memory device

Life of this patent

Non-volatile semiconductor memory device

Life of this patent

Abstract

Claims17