Nonvolatile semiconductor memory device having control circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsukasa Ooishi
Life of this patent
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Abstract
If forward write is performed to a nonvolatile memory cell, a switch signal output circuit outputs a switch signal to a plurality of switch circuits. As a result, corresponding potentials are supplied to a plurality of bit lines, respectively. A potential supply circuit supplies a write potential and a ground potential to the corresponding bit lines, respectively. Therefore, this nonvolatile semiconductor memory device can suppress an unnecessary current generated during data write.
Claims18
A nonvolatile semiconductor memory device comprising:
- a plurality of word lines arranged in rows;
- a plurality of bit lines arranged in columns;
- a plurality of memory cells each having at least one storage region storing data, and arranged in the rows and the columns;
- and
- a control circuit selecting a plurality of continuously arranged bit lines among said plurality of bit lines, and supplying a plurality of predetermined potentials corresponding to said plurality of selected bit lines, wherein
- said plurality of memory cells arranged in said rows are connected in series and gates thereof are connected to the word line arranged in the rows thereof, and
- each of said plurality of bit lines is connected to the plurality of memory cells arranged in the two adjacent columns.
A nonvolatile semiconductor memory device comprising:
- a plurality of word lines arranged in rows;
- a plurality of bit lines arranged in columns;
- a plurality of memory cells each having at least one storage region storing data, and arranged in the rows and the columns;
- and
- a write circuit writing a plurality of data to a plurality of continuously arranged memory cells among a plurality of memory cells arranged in the same row, wherein
- said plurality of memory cells arranged in said rows are connected in series and gates thereof are connected to the word line arranged in the row thereof, and
- each of said plurality of bit lines is connected to the plurality of memory cells arranged in the two adjacent columns.
A nonvolatile semiconductor memory device comprising:
- a plurality of word lines arranged in rows;
- a plurality of bit lines arranged in columns;
- a plurality of memory cells each having at least one storage region storing data, and arranged in the rows and the columns;
- and
- a write circuit writing a plurality of data to a plurality of continuously arranged memory cells among a plurality of memory cells arranged in the same row, wherein
- said plurality of memory cells arranged in said rows are connected in series and gates thereof are connected to the word line arranged in the row thereof,
- each of said plurality of bit lines is connected to a plurality of memory cells arranged in the two adjacent columns, and
- each of said plurality of memory cells stores a plurality of data with not less than three levels.
Dependencies are inferred from the claim text.