Semiconductor device having switch circuit to supply voltage

A semiconductor device comprising:

• a memory cell array having a plurality of memory cells arranged in a matrix form, each of the memory cells having a floating gate and a control gate and data stored in the memory cell being electrically programmable and erasable,
• a plurality of word lines each commonly coupled to the control gates of a plurality of memory cells which are arranged on a corresponding one of rows in the memory cell array,
• a plurality of bit lines each commonly coupled to drains of a plurality of memory cells which are arranged on a corresponding one of columns in the memory cell array,
• an external voltage input terminal to which an external voltage is supplied from the exterior,
• a first voltage generating circuit which lowers the external voltage supplied to the external voltage input terminal and generates a voltage to be supplied to the word line coupled to the control gates of the memory cells, and
• a second voltage generating circuit which lowers the external voltage supplied to the external voltage input terminal and generates a voltage to be supplied to the bit line coupled to the drains of the memory cells.