# US 2003/0151578 A1 · Reference voltage generation circuit, display driver circuit, display device, and method of generating reference voltage > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2003/0151578 A1 - Document ID: US20030151578A1 - Status: Published application - Kind: A1 - Application number: 10/355,298 - Filed: 2003-01-31 - Published: 2003-08-14 - Earliest claimed: 2002-02-08 - Assignees: Seiko Epson Corporation - Inventors: Akira Morita - Web page: https://patentgrep.com/patent/US20030151578A1 ## CPC - G09G 3/2011: {by amplitude modulation} - G09G 3/3688: {suitable for active matrices only} - G09G 3/325: the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters - G09G 2320/0276: for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A reference voltage generation circuit includes first to third resistance ladder circuits. The first resistance ladder circuit has at least one variable resistance circuit in which a resistance value between both ends is variable, and outputs multi-valued reference voltages. The second resistance ladder circuit has series-connected resistance circuits each of which has a fixed resistance value, and outputs a plurality of reference voltages. The third resistance ladder circuit has at least one variable resistance circuit in which a resistance value between both ends is variable, and outputs multi-valued reference voltages. The first to third resistance ladder circuits are connected in series between first and second power supply lines. The resistance values of the variable resistance circuits in the first and third resistance ladder circuits are variably controlled by a given command or a variable control signal input through an external input terminal. ## Claims ### Claim 1 A reference voltage generation circuit which generates multi-valued reference voltages for generating a gamma-corrected grayscale value based on grayscale data, the reference voltage generation circuit comprising: a first resistance ladder circuit having at least one variable resistance circuit in which a resistance value between both ends is variable, and outputting multi-valued voltages; a second resistance ladder circuit in which a plurality of resistance circuits each having a fixed resistance value are connected in series, outputting a plurality of voltages; and a third resistance ladder circuit having at least one variable resistance circuit in which a resistance value between both ends is variable, and outputting multi-valued voltages, wherein the first to third resistance ladder circuits are connected in series between first and second power supply lines to which first and second power supply voltages are respectively supplied; and wherein the resistance values of the variable resistance circuits in the first and third resistance ladder circuits are variably controlled according to a given command setting or a given variable control signal. ### Claim 2 (depends on 1) The reference voltage generation circuit as defined in claim 1, wherein at least one of the variable resistance circuits of the first and third resistance ladder circuits includes parallel-connected resistance switch circuits, each of the resistance switch circuits having a switch element and a resistance element connected to each other in series. ### Claim 3 (depends on 2) The reference voltage generation circuit as defined in claim 2, wherein the variable resistance circuit further includes a resistance element connected in parallel with at least one of the resistance switch circuits. ### Claim 4 (depends on 1) The reference voltage generation circuit as defined in claim 1, wherein at least one of the variable resistance circuits of the first and third resistance ladder circuits includes series-connected resistance switch circuits, each of the resistance switch circuits having a resistance element and a switch element connected to each other in parallel. ### Claim 5 (depends on 2) The reference voltage generation circuit as defined in claim 2, wherein at least one of the first and third resistance ladder circuits has at least two of the variable resistance circuits which are connected to each other in series. ### Claim 6 (depends on 1) The reference voltage generation circuit as defined in claim 1, wherein the variable resistance circuit in at least one of the first and third resistance ladder circuits includes: a resistance element inserted between the i-th divided node (i is a positive integer) for generating the i-th reference voltage and the (i−1)th divided node for outputting the (i−1)th reference voltage among first to R-th reference voltages (1≦i≦R, R is an integer equal to or larger than 2); a first operational amplifier circuit which is voltage-follower connected and an input of which is connected to the i-th divided node; a first switch element inserted between an output node of the i-th reference voltage and an output of the first operational amplifier circuit; and a second switch element inserted between the output node of the i-th reference voltage and the i-th divided node, wherein the first switch element is in the ON state and the second switch element is in the OFF state during a former period in a given drive period, and the first switch element is in the OFF state and the second switch element is in the ON state during a latter period in the drive period; and wherein an operating current of the first operational amplifier circuit is limited or terminated in the latter period of the drive period. ### Claim 7 (depends on 6) The reference voltage generation circuit as defined in claim 6, further comprising: a second operational amplifier circuit inserted between an output of the first operational amplifier circuit and an output node of the (i+1)th reference voltage, wherein the second operational amplifier circuit outputs a voltage obtained by applying a given offset voltage to the i-th reference voltage in the former period; and wherein an operating current of the second operational amplifier circuit is limited or terminated in the latter period of the drive period. ### Claim 8 (depends on 1) The reference voltage generation circuit as defined in claim 1, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 9 (depends on 2) The reference voltage generation circuit as defined in claim 2, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 10 (depends on 3) The reference voltage generation circuit as defined in claim 3, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 11 (depends on 4) The reference voltage generation circuit as defined in claim 4, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 12 (depends on 5) The reference voltage generation circuit as defined in claim 5, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 13 (depends on 6) The reference voltage generation circuit as defined in claim 6, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 14 (depends on 7) The reference voltage generation circuit as defined in claim 7, wherein: each of the first to third resistance ladder circuits is formed of the first to P-th resistance circuits (P is a positive integer); and in the second resistance ladder circuit, a ratio of a first resistance value of the L-th resistance circuit (1≦L≦P, L is an integer) when driving a first display panel to a second resistance value of the L-th resistance circuit when driving a second display panel is equal to or less than 2. ### Claim 15 (depends on 1) A display driver circuit comprising: the reference voltage generation circuit as defined in claim 1; a voltage select circuit which selects a voltage from among multi-valued reference voltages generated by the reference voltage generation circuit, based on grayscale data; and a signal electrode driver circuit which drives a signal electrode by using the voltage selected by the voltage select circuit. ### Claim 16 (depends on 8) A display driver circuit comprising: the reference voltage generation circuit as defined in claim 8; a voltage select circuit which selects a voltage from among multi-valued reference voltages generated by the reference voltage generation circuit, based on grayscale data; and a signal electrode driver circuit which drives a signal electrode by using the voltage selected by the voltage select circuit. ### Claim 17 (depends on 15) The display driver circuit as defined in claim 15, further comprising an external input terminal through which the variable control signal is input. ### Claim 18 (depends on 16) The display driver circuit as defined in claim 16, further comprising an external input terminal through which the variable control signal is input. ### Claim 19 (depends on 15) A display device comprising: a plurality of signal electrodes; a plurality of scanning electrodes which intersect the signal electrodes; pixels specified by the signal electrodes and the scanning electrodes; the display driver circuit as defined in claim 15 which drives the signal electrodes; and a scanning electrode driver circuit which drives the scanning electrodes. ### Claim 20 (depends on 15) A display device comprising: a display panel having a plurality of signal electrodes, a plurality of scanning electrodes which intersect the signal electrodes, and pixels specified by the signal electrodes and the scanning electrodes; the display driver circuit as defined in claim 15 which drives the signal electrodes; and a scanning electrode driver circuit which drives the scanning electrodes. ### Claim 21 A method of generating multi-valued reference voltages for generating a gamma-corrected grayscale value based on grayscale data, the method comprising: providing first to third resistance ladder circuits connected in series between first and second power supply lines to which first and second power supply voltages are respectively supplied; fixing a resistance value of the second resistance ladder circuit; and variably controlling resistance values of resistance circuits forming the first and third resistance ladder circuits, according to a given command or a variable control signal.