(n-1)/n current reduction scheme in a n-to-one parallel-to-serial conversion
AssigneeIntel Corporation
InventorHui Shi
Life of this patent
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AssigneeIntel Corporation
InventorHui Shi
Estimating the term…
A system and method are used to convert a parallel datastream to a serial datastream. N number of parallel bits are input to n number of selection devices. One of the n number of selection devices is selected as an active selection device. The active selection device is directly coupled to a corresponding current source. The (n−1) inactive selection devices are coupled to a current steering device. The current steering device is coupled to the corresponding (n−1) inactive selection devices. The current steering devices allow taking over by input data bit or latch on the previous bit if there is no input. The parallel bit is converted to a bit in the serial datastream by generating a voltage representative of a value of the serial bit utilizing a combined current from the n current sources.
A parallel-to-serial conversion device, comprising:
A method of converting n parallel bits one at a time to a bit in a serial bit datastream in a current efficient manner, comprising:
A transmitting device, comprising:
Dependencies are inferred from the claim text.