Multilayer ceramic device

A multilayer ceramic device comprising:

• a first ceramic layer having a recess and a multilayer circuit pattern electrically connected through interlayer via holes;
• a second ceramic layer having a multilayer circuit pattern electrically connected through interlayer via holes, the second ceramic layer being layered on the first ceramic layer;
• at least one semiconductor bare chip mounted on a bottom of the recess defined by the first ceramic layer, wherein the semiconductor bare chip includes an electrode part that faces the bottom of the recess, and a top part of the semiconductor bare chip is coated with a sealing resin;
• and
• a land grid array terminal disposed on a surface of the second ceramic layer that does not face the first ceramic layer.

A multilayer ceramic device comprising:

• a first ceramic layer having a recess at a top part thereof and a first multilayer circuit pattern electrically connected through interlayer via holes;
• a second ceramic layer having a second multilayer circuit pattern electrically connected through interlayer via holes, said second ceramic layer being layered on said first ceramic layer;
• and
• at least one semiconductor bare chip mounted on a bottom of the recess, wherein the semiconductor bare chip includes an electrode part that faces the recess bottom, and the top of the semiconductor bare chip is coated with a sealing resin.

A mobile terminal device comprising:

• a display;
• and
• a communication member having
• a multilayer ceramic device comprising:
• a first ceramic layer having a multilayer circuit pattern electrically connected through interlayer via holes;
• and
• a second ceramic layer having a multilayer circuit pattern electrically connected through interlayer via holes, the second ceramic layer being layered on the first ceramic layer;
• wherein the first ceramic layer has at least one semiconductor bare chip mounted on a surface of the first ceramic layer that does not face the second ceramic layer,
• the electrode part of the bare chip facing the first ceramic layer surface, and the top part thereof are coated with a sealing resin, and
• the second ceramic layer has a land grid array terminal disposed on a surface of the second ceramic layer that does not face the first ceramic layer.