Logic circuits using polycrystalline semiconductor thin film transistors
AssigneeSeiko Epson Corporation
InventorMujahid Islam
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Abstract
A large scale integrated (LSI) or a very large scale integrated (VLSI) logic circuit. such as a fully progammable gate array (FPGA), comprises a plurality of polysilicon thin film transistors TFTs. The circuit, which may include a delay circuit, is asynchronous and does not comprise a clock. Thus, operations to be performed by the TFTs need not be performed within a single clock period—rather the operation of each stage of TFTs in the circuit is dependent on receiving a signal either from an input to the circuit or from a preceding stage in the circuit. Problems with variations in the threshold voltage between the TFTs are therefore avoided.
Claims46
A polycrystalline semiconductor thin film transistor asynchronous logic circuit comprising an array of logic blocks including a first logic block for performing a logic operation and for providing logic output signals to a second logic block, wherein the second logic block is arranged not to commence its logic operation until the first logic block has completed its logic operation.
An asynchronous logic circuit according to any one of the preceding claims, wherein the logic blocks are arranged to provide logic output signals in binary form comprising of at least two bits such that the logic output signals can be used to signify logic ONE, logic ZERO, a not ready condition, and an unacceptable condition for each logic block.
An asynchronous logic circuit according to any one of the preceding claims, wherein said circuit comprises no transistors other than polycrystalline semiconductor thin film transistors.
An asynchronous logic circuit according to any one of the preceding claims, wherein said asynchronous logic circuit is a large scale integrated or a very large scale integrated digital logic circuit.
An asynchronous logic circuit according to any one of the preceding claims, wherein said semiconductor includes polysilicon as an active layer.
An asynchronous logic circuit according to any one of the preceding claims comprising an array of the logic blocks configured to provide a fully programmable gate array (FPGA).
An asynchronous logic circuit according to any one of the preceding claims, wherein the logic function of any logic block is programmable.
A method of performing asynchronous logic comprising providing an asynchronous logic circuit of polycrystalline semiconductor thin film transistors arranged as an array of logic blocks including a first logic block performing a logic operation and providing logic output signals to a second logic block and arranging the second logic block not to commence its logic operation until the first logic block has completed its logic operation.
Dependencies are inferred from the claim text.