Microelectronic die providing improved heat dissipation, and method of packaging same
OwnerWarren Stuart Crippeninventor
Life of this patent
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Abstract
A microelectronic die and a method of packaging the die. A thermally conductive material, such as copper, is placed in an inner region located between a die substrate, such as a silicon wafer, and a dielectric, such as a subsequent silicon layer. A microelectronic circuit is provided on at least one of the die substrate and the dielectric. Thermal contact is established between an outer region located outside of the inner region and the thermally conductive material placed in the inner region to effect a dissipation of heat away from the microelectronic circuit.
Claims21
A method of packaging a microelectronic die, comprising:
- placing a thermally conductive material on a die substrate;
- and
- establishing thermal contact between an outer region located outside of the inner region and the thermally conductive material placed in the inner region to effect a dissipation of heat away from the die.
A method of packaging a microelectronic die, comprising:
- depositing a layer of thermally conductive material on a die substrate;
- depositing a layer of dielectric on the layer of thermally conductive material such that the layer of thermally conductive material is placed in an inner region located between the die substrate and the layer of dielectric;
- providing a microelectronic circuit the layer of dielectric;
- and
- establishing thermal contact between an outer region located outside of the inner region and the layer of thermally conductive material placed in the inner region to effect a dissipation of heat away from the microelectronic circuit.
A method of packaging a microelectronic die, comprising:
- creating a plurality of vias in a silicon wafer;
- depositing a layer of copper on the silicon wafer such that at least some of the copper is deposited in the plurality of vias;
- depositing a layer of silicon on the layer of copper such that the layer of copper is placed in an inner region located between the silicon wafer and the layer of silicon;
- providing a microelectronic circuit on the layer of silicon;
- and
- establishing thermal contact between an outer region located outside of the inner region and the layer of copper placed in the inner region to effect a dissipation of heat away from the microelectronic circuit, establishing thermal contact including:
- etching the silicon wafer to expose a plurality of thermal contact zones of the layer of copper, each of the thermal contact zones corresponding to a location of a respective one of the plurality of vias;
- applying solder to each of the thermal contact zones;
- and
- placing a heat dissipation device over the solder to create a first package to effect a dissipation of heat away from the microelectronic circuit through the solder and the heat dissipation device.
A microelectronic die package comprising:
- a die substrate;
- a layer of dielectric mounted to the die substrate;
- a thermally conductive material disposed in an inner region located between the die substrate and the layer of dielectric;
- and
- thermal contact elements disposed between an outer region located outside of the inner region and the thermally conductive material disposed in the inner region to effect a dissipation of heat away from the die.
A microelectronic die package comprising:
- a silicon wafer defining a plurality of vias therein;
- a layer of copper on the silicon wafer, at least some of the copper being disposed in the plurality of vias to define thermal contact zones in the plurality of vias;
- a layer of silicon disposed on the layer of copper, the layer of copper being disposed in an inner region located between the silicon wafer and the layer of silicon;
- a microelectronic circuit provided on the layer of silicon;
- and
- thermal contact elements disposed between an outer region located outside of the inner region and the layer of copper in the inner region to effect a dissipation of heat away from the microelectronic circuit, the thermal contact zones in the plurality of vias being in thermal contact with the thermal contact elements, the thermal contact elements comprising:
- solder in thermal contact with the thermal contact zones in the plurality of vias;
- and
- a heat dissipation device in thermal contact with the solder.
A thermally conductive microelectronic die substrate for a microelectronic die comprising:
- a die substrate;
- and
- a thermally conductive material provided on the die substrate and defining thermal contact zones configured to effect a dissipation of heat away from the die.
A microelectronic die package comprising:
- a die substrate;
- a layer of dielectric mounted to the die substrate;
- means disposed in an inner region located between the die substrate and the layer of dielectric for effecting a dissipation of heat away from the microelectronic circuit;
- and
- means in thermal contact with the means for effecting for directing heat away from the die through the means for effecting.
Dependencies are inferred from the claim text.