Thin film transistor array substrate for liquid crystal display and method for fabricating same
AssigneeSamsung Electronics Co., Ltd.
InventorsChun-Gi You, Hyang-Shik Kong
Life of this patent
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Abstract
A thin film transistor array substrate includes a substrate, a gate wire with a gate line and a gate electrode formed on the substrate, a gate insulating layer covering the gate wire, and a semiconductor pattern formed on the gate insulating layer. A data wire is formed on the gate insulating layer and the semiconductor pattern with a data line, and a source electrode and a drain electrode. The data wire bears a multiple-layered structure having a metallic layer and an intermetallic compound layer. A protective layer is formed on the data wire and the semiconductor pattern. A pixel electrode is formed on the protective layer while contacting the drain electrode through a contact hole.
Claims43
A thin film transistor array substrate, comprising:
- a substrate;
- a gate wire formed on the substrate, the gate wire comprising a gate line and a gate electrode;
- a gate insulating layer covering the gate wire;
- a semiconductor pattern formed on the gate insulating layer;
- a data wire formed on the gate insulating layer and the semiconductor pattern with a multiple-layered structure having a first metallic layer and an intermetallic compound layer, the data wire comprising a data line, a source electrode and a drain electrode;
- a protective layer formed on the data wire and the semiconductor pattern;
- a first contact hole exposing the drain electrode;
- and
- a pixel electrode contacting the drain electrode through the first contact hole.
A method of fabricating a thin film transistor array substrate, comprising the steps of:
- forming a gate wire on an insulating substrate through depositing a conductive layer for gate wire on the substrate and patterning the conductive layer, the gate wire comprising a gate line and a gate electrode;
- forming a gate insulating layer on the substrate to cover the gate wire;
- forming a semiconductor layer on the gate insulating layer;
- depositing a conductive layer for a data wire and a metallic layer on the gate insulating layer sequentially, and performing an annealing process;
- forming a data wire by patterning the conductive layer a data wire, the data wire comprising a data line, a source and a drain electrode;
- depositing a protective layer covering the data wire;
- forming a first contact hole exposing the drain electrode;
- and
- forming a pixel electrode electrically connected to the drain electrode.
A method for fabricating a thin film transistor array substrate, comprising the steps of:
- forming a gate wire on a substrate through depositing a conductive layer for gate wire on the substrate and patterning the conductive layer, the gate wire comprising a gate line and a gate electrode;
- forming a gate insulating layer covering the gate wire on the substrate;
- forming a semiconductor pattern on the gate insulating layer;
- depositing a multiple-layered conductive layer and a metallic layer on the gate insulating layer and the semiconductor pattern sequentially;
- forming a data wire having a multiple-layered structure by patterning the multiple-layered structure of the conductive layer, the metallic layer, the data wire comprising a data line, a source electrode and a drain electrode;
- forming a protective layer covering the semiconductor pattern;
- forming a first contact hole exposing the drain electrode;
- and
- forming a pixel electrode on the protective layer connected to the drain electrode through the first contact hole.
Dependencies are inferred from the claim text.