SOI MOS field effect transistor and manufacturing method therefor
AssigneeOki Electric Industry Co., Ltd.
InventorsNorio Hirashita, Takashi Ichimori
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Abstract
A device isolation region made up of a silicon oxide film, which is perfectly isolated up to the direction of the thickness of an SOI silicon layer, and an activation region of the SOI silicon layer, whose only ends are locally thinned, are formed on an SOI substrate. A source diffusion layer and a drain diffusion layer of a MOS field effect transistor in the activation region are provided so that according to the silicidization of the SOI silicon layer subsequent to the formation of a high melting-point metal, a Schottky junction is formed only at each end of the activation region and a PN junction is formed at a portion other than each end thereof.
Claims14
An SOI MOS field effect transistor, comprising:
- a device isolation region;
- an activation region of an SOI silicon layer surrounded by the device isolation region;
- a gate electrode formed so as to cross the activation region;
- and
- source and drain layers formed within the activation region and on both sides of the gate electrode;
- wherein a Schottky junction is formed between the source and drain layers and the SOI silicon layer only at a portion where an end of the activation region and the gate electrode intersect, and a PN junction is formed between the source and drain layers other than those and the SOI silicon layer.
An SOI MOS field effect transistor, comprising:
- a device isolation region;
- an activation region of an SOI silicon layer surrounded by the device isolation region;
- source and drain diffusion regions formed in the activation region;
- and
- a silicide region formed in each of the source and drain diffusion regions,
- wherein a body region formed in the activation region is surrounded by the device isolation region and the source and drain diffusion regions and the silicide region located at a boundary portion between the device isolation region and the source and drain diffusion regions.
A method of manufacturing an SOI MOS field effect transistor, comprising the following steps of:
- oxidizing the thickness of an SOI silicon layer over its entirety to thereby form a silicon oxide film;
- forming a device isolation region and an activation region in which only ends sharing borders with the device isolation region are locally thinned;
- forming a gate electrode, a source diffusion layer and a drain diffusion layer of the SOI MOS field effect transistor in the activation region;
- and
- forming a high melting-point metal layer, silicidizing parts of the source diffusion layer and drain diffusion layer except for the sides of the gate electrode and thereby selectively forming a Schottky junction at each end of the activation region and forming a PN junction at a portion other than said each end thereof.
Dependencies are inferred from the claim text.