High-voltage transistor with multi-layer conduction region
AssigneePower Integrations, Inc.
InventorsVladimir Rumennik, Donald R. Disney, Janardhanan S. Ajit
Life of this patent
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Abstract
A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried layers create an associated plurality of parallel JFET conduction channels in the extended portion of the well region. The parallel JFET conduction channels provide the HVFET with a low on-state resistance.
Claims102
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed within the substrate;
- a source diffusion region of the second conductivity type disposed in the substrate spaced-apart from the first region, a channel region being formed in the substrate between the source diffusion region and the first region;
- a source electrode connected to the source diffusion region;
- a drain diffusion region of the second conductivity type disposed within the first region;
- a drain electrode connected to the drain diffusion region;
- a buried region of the first conductivity type disposed within the first region, a first conduction channel being formed above the buried region and a second conduction channel being formed below the buried region, the buried region being spaced-apart from the drain diffusion region;
- and
- an insulated gate formed over the channel region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed within the substrate;
- a source diffusion region disposed in the substrate spaced-apart from the first region, an IGFET channel region being formed between the source diffusion region and the first region;
- a drain diffusion region disposed in the first region;
- a buried region of said first conductivity type disposed within the first region, the buried region forming JFET channels within the first region, one JFET channel being formed above the buried region and another JFET channel below the buried region, the buried region being spaced-apart from the drain diffusion region;
- an insulated gate formed above the IGFET channel region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed in the substrate, the first region having an above region, a below region and a lateral boundary;
- at least one buried region of the first conductivity type sandwiched within the first region between the above and below regions;
- a source diffusion region of the second conductivity type disposed in the substrate, an IGFET channel region being formed between the source diffusion region and the first region;
- a drain diffusion region of said second conductivity type disposed in the first region spaced-apart from the at least one buried region;
- an insulated gate formed over the IGFET channel region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type;
- a source diffusion region of the second conductivity type disposed in the substrate spaced-apart from the first region to form an IGFET channel region therebetween;
- a drain diffusion region disposed in the first region;
- a first plurality of buried layers of the first conductivity type disposed within the first region spaced-apart from the drain diffusion region, the first plurality of buried layers forming an associated plurality of JFET channels in the first region;
- an insulating layer disposed over the substrate;
- and
- a gate overlying an area of the insulating layer above the IGFET channel region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a source diffusion region of a second conductivity type disposed in the substrate, the source diffusion region having a source fingertip area;
- a first region of the second conductivity type disposed in the substrate spaced-apart from the source diffusion region with an IGFET channel region being formed therebetween, the first region having a pair of drain fingertips areas inter-digitated with the source fingertip area;
- a drain diffusion region of the second conductivity type disposed in the first region;
- a buffer area formed between the source diffusion region and the first region adjacent the source fingertip area, the buffer area being substantially wider than the IGFET channel region;
- an insulated gate disposed above the IGFET channel region;
- at least one buried layer of the first conductivity type disposed within the first region, the at least one buried layer forming two or more JFET channels in the first region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type;
- a second region of the first conductivity type disposed in the first region;
- a source diffusion region of the second conductivity type disposed in the second region, a channel region being formed between the first region and the source diffusion region;
- a drain diffusion region of the second conductivity type disposed in the first region;
- a buried region of the first conductivity type sandwiched within the first region to form first and second JFET channels therein, the first JFET channel being formed above the buried region and the second JFET channel being formed below the buried region, the buried region being spaced-apart from the drain diffusion region;
- an insulated gate formed over the channel region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed in the substrate, the first region having a laterally extended portion that forms a lateral boundary with the substrate;
- a drain diffusion region of the second conductivity type disposed in the first region and separated from the lateral boundary by the laterally extended portion;
- a second region of the first conductivity type disposed in the substrate;
- a source diffusion region of the second conductivity type disposed in the second region, a channel region being formed between the source diffusion region. and the lateral boundary;
- an insulated gate disposed above the channel region;
- a buried region of the first conductivity type sandwiched within the laterally extended portion of the first region to form a junction field-effect device in which current flows in the first region both above and below the buried region.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed in the substrate, the first region having a laterally extended portion that forms a lateral boundary with the substrate;
- a drain diffusion region of the second conductivity type disposed in the first region and separated from the lateral boundary by the laterally extended portion;
- a source diffusion region of the second conductivity type disposed in the substrate and spaced-apart from the lateral boundary of the first region, a channel region being formed between the source diffusion region and the lateral boundary;
- an insulated gate disposed above the channel region;
- a first buried layer of the first conductivity type disposed in the substrate beneath the source diffusion region;
- a second buried layer of the first conductivity type sandwiched within the laterally extended portion of the first region and spaced-apart from the lateral boundary so as to act as an effective gate controlling dual current channels in the first region both above and below the second buried layer.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a first region of a second conductivity type disposed in the substrate, the first region having a laterally extended portion that forms a lateral boundary with the substrate;
- a drain diffusion region of the second conductivity type disposed in the first region and separated from the lateral boundary by the laterally extended portion;
- a source diffusion region of the second conductivity type disposed in the substrate and spaced-apart from the lateral boundary, an IGFET channel region being formed between the source diffusion region and the lateral boundary;
- an insulated gate disposed above the IGFET channel region;
- a buried layer of the first conductivity type disposed in the substrate spaced-apart from the drain diffusion region, the buried layer extending through the laterally extended portion of the first region to beneath the source diffusion region, the buried layer dividing the first region into an above region and a below region, the buried layer having one or more openings which connect the above and below regions.
A high voltage field-effect transistor (HVFET) comprising:
- a substrate of a first conductivity type;
- a epitaxial layer of a second conductivity type disposed on the substrate;
- a diffusion region of the first conductivity type disposed in the epitaxial layer, a junction being formed between the diffusion region and the epitaxial layer;
- a drain region of the second conductivity type disposed in the epitaxial layer and separated from the junction by a portion of the epitaxial layer;
- a source region of the second conductivity type disposed in the diffusion region, the source region being spaced-apart from the junction, a channel region being formed between the source region and the junction;
- an insulated gate disposed above the channel region;
- a buried layer of the first conductivity type disposed within the portion of the epitaxial layer spaced-apart from the drain diffusion region, the buried layer acting as an effective gate to control dual current channels formed above and below the buried layer.
Dependencies are inferred from the claim text.