Design method for plating of printed circuit board strip and manufacturing method of semiconductor chip package using the same

A design method for plating of a printed circuit board strip (PCB strip) having a plurality of printed circuit board units (PCB units), comprising:

• forming a main plating line on any one of a solder side, a component side, and an inner layer between adjacent PCB units,
• said PCB units each comprising:
• the component side allowing a semiconductor chip to be mounted thereon, and having a bond finger part and first copper-clad parts for constructing a first circuit pattern, said first copper-clad parts including conductive via lands, and said bond finger part being wire-bonded to the first copper-clad parts;
• the solder side having second copper-clad parts for constructing a second circuit pattern, and solder ball parts provided on the second copper-clad parts for receiving solder balls thereon, said second copper-clad parts including the conductive via lands, and said solder balls being melted and attached to the solder ball parts of the copper-clad parts ;
• and
• one or more inner layers inserted between the component side and the solder side, and having drill holes connected to the conductive via lands of a third copper-clad part and the sub-plating line connected to the third copper-clad parts thereon.

A design method for plating of a printed circuit board strip (PCB strip) having a plurality of printed circuit board units (PCB units), comprising:

• connecting a sub-plating line to a bond finger part of a component side and solder ball parts of a solder side without a main plating line between adjacent PCB units;
• connecting the sub-plating line to copper-clad parts at an outermost board of each PCB unit;
• and
• plating the solder ball parts of the solder side and the bond finger part of the component side through the sub-plating line and the copper-clad parts including conductive via lands,
• wherein, each of said PCB units comprises:
• the component side allowing a semiconductor chip mounted thereon, and having the bond finger part and first copper-clad parts for constructing a first circuit pattern, said first copper-clad parts including the conductive via lands, and said bond finger part being wire-bonded to the first copper-clad parts;
• and
• the solder side having second copper-clad parts for constructing a second circuit pattern, and the solder ball parts provided on the second copper-clad parts for receiving solder balls thereon, said second copper-clad parts including the conductive via lands, and said solder balls being melted and attached to the solder ball parts of the second copper-clad parts.

A design method for plating of a printed circuit board strip (PCB strip) having a plurality of printed circuit board units (PCB units), comprising:

• connecting a sub-plating line to a bond finger part of a component side, solder ball parts of a solder side, and copper-clad parts including conductive via lands and drill holes of an inner layer without a main plating line between adjacent PCB units on the component side, the solder side, and the inner layer;
• connecting the sub-plating line to the copper-clad parts at an outermost board of each PCB unit;
• and
• plating the solder ball parts of the solder side and the bond finger part of the component side through the sub-plating line and the copper-clad parts including the conductive via lands,
• wherein, each of said PCB units comprises:
• the component side allowing a semiconductor chip mounted thereon, and having a bond finger part and first copper-clad parts for constructing a first circuit pattern, said first copper-clad parts including conductive via lands, and said bond finger part being wire-bonded to the copper-clad parts;
• the solder side having second copper-clad parts for constructing a second circuit pattern, and solder ball parts provided on the second copper-clad parts for receiving solder balls thereon, said second copper-clad parts including the conductive via lands, and said solder balls being melted and attached to the solder ball parts of the second copper-clad parts;
• and
• one or more inner layer inserted between the component side and the solder side, and having the drill holes connected to the conductive via lands of third copper-clad parts and the sub-plating line connected to the third copper-clad parts.

A manufacturing method of a semiconductor chip package, comprising:

• providing a strip having a component side and a solder side;
• half-etching the strip at a low temperature for a short time to allow the strip to have a uniform etched surface and a constant thickness;
• drilling the etched strip to form a plurality of holes at desired positions of the strip;
• horizontally plating the drilled strip;
• designing a circuit pattern of the plated strip;
• printing the designed circuit pattern on the plated strip to form a PCB strip;
• plating the PCB strip with gold;
• routing the gold-plated PCB strip to form a plurality of grooves on the gold-plated PCB strip;
• and
• inspecting the resulting PCB strip.

A manufacturing method of a semiconductor chip package, comprising:

• providing a printed circuit board strip (PCB strip) comprising a component side and a solder side, with a plurality of printed circuit board units (PCB units) arranged at regular intervals on the PCB strip and a main plating line optionally formed on the solder side or the component side, said component side having a bond finger part wire-bonded to first copper-clad parts for constructing a first circuit pattern, said solder side having second copper-clad parts for constructing a second circuit pattern, and solder ball parts provided on the second copper-clad parts for receiving solder balls thereon, said solder balls being melted and attached to the solder ball parts, said first and second copper-clad parts including conductive via lands;
• plating the solder ball parts of the solder side and the bond finger part of the component side through the main plating line or each of the via lands;
• mounting semiconductor chips on the component side of the plated PCB strip and wire-bonding the semiconductor chips to the PCB strip;
• trimming leads of the solder side and soldering the leads to the solder side;
• and
• cutting the resulting PCB strip along the main plating line of the solder side or the component side using a sawing machine without a short due to misalignment of the solder side from the component side.

A manufacturing method of a semiconductor chip package, comprising:

• providing a printed circuit board strip (PCB strip) comprising a component side and a solder side, with a plurality of printed circuit board units (PCB units) arranged at regular intervals on the PCB strip, one or more inner layer inserted between the component side and the solder side, and a main plating line optionally formed on the component side, the inner layer, or the solder side, said component side having a bond finger part wire-bonded to first copper-clad parts for constructing a first circuit pattern, said solder side having second copper-clad parts for constructing a second circuit pattern and solder ball parts provided on the second copper-clad parts for receiving solder balls thereon, said solder balls being melted and attached to the solder ball parts, said inner layer having third copper-clad parts for constructing a third circuit pattern, said third copper-clad parts including drill holes and being connected to a sub-plating line;
• plating the solder ball parts of the solder side, and the bond finger part of the inner layer or the component side through the main plating line or each of the via lands;
• mounting semiconductor chips on the component side of the plated PCB strip and wire-bonding the semiconductor chips to the PCB strip;
• trimming leads of the solder side and soldering the leads to the solder side;
• and
• cutting the resulting PCB strip along the main plating line of the component side, the inner layer, or the solder side using a sawing machine without a short due to misalignment of the solder side with the component side.