Method of switching external models in an automated system-on-chip integrated circuit design verification system
AssigneeInternational Business Machines Corporation
InventorsRobert J. Devins, Robert D. Herzl, David W. Milton
Life of this patent
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Abstract
A system for verifying an integrated circuit design is provided. The system comprising: an I/O controller connected to one or more I/O cores, the I/O cores part of the integrated circuit design; an external memory mapped test device having a switch for selectively connecting one or more of the I/O cores to corresponding I/O driver models; a bus for transferring signals between the I/O controller and the switch; and a test operating system for controlling the switch.
Claims20
A system for verifying an integrated circuit design comprising:
- an I/O controller connected to one or more I/O cores, said I/O cores part of said integrated circuit design;
- an external memory mapped test device having a switch for selectively connecting one or more of said I/O cores to corresponding I/O driver models;
- a bus for transferring signals between said I/O controller and said switch;
- and
- a test operating system for controlling said switch.
A method for verifying an integrated circuit design comprising:
- providing an I/O controller connected to one or more I/O cores, said I/O cores part of said integrated circuit design;
- providing an external memory mapped test device having a switch for selectively connecting one or more of said I/O cores to corresponding I/O driver models;
- providing a bus for transferring signals between said I/O controller and said switch;
- providing a test operating system for controlling said switch;
- and
- simulating said integrated circuit design by running a test case on said test operating system.
A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for verifying an integrated circuit design, said method steps comprising:
- providing an I/O controller connected to one or more I/O cores, said I/O cores part of said integrated circuit design;
- providing an external memory mapped test device having a switch for selectively connecting one or more of said I/O cores to corresponding I/O driver models;
- providing a bus for transferring signals between said I/O controller and said switch;
- providing a test operating system for controlling said switch;
- and
- simulating said integrated circuit design by running a test case on said test operating system.
Dependencies are inferred from the claim text.