Decoding structure for a memory device with a control code
AssigneeSTMicroelectronics S.r.I.
InventorsEmanuele Confalonieri, Marco Sforzin
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Abstract
A decoding structure for a memory device with a control code is used in a memory including a matrix of memory cells grouped into pages to each of which a block of control information is associated, and a plurality of reading elements for reading a plurality of pages in parallel. The decoding structure selectively connects each reading element to a plurality of memory cells, and selectively connects each memory cell to a plurality of reading elements.
Claims10
A decoding structure (110c) for a memory device (100) with a control code including a matrix (105) of memory cells (Mfg) grouped into pages to each one a block of control information is associated and a plurality of reading elements (SA0-SA7) for reading a plurality of pages in parallel, wherein the decoding structure includes means (TRCo, TRCn, 205o, 205n) for selectively connecting each reading element to a plurality of memory cells, characterized in that the structure further includes means (TRCm, 305m) for selectively connecting each memory cell to a plurality of reading elements.
The decoding structure (110c) according to any claim from 2 to 4, further including first decoding means (205o, 205n, 305m) for generating a plurality of first selection signals (Yo0-Yo3,Yn0-Yn1,Ym0-Ym3) each one for simultaneously controlling a corresponding selection element (Ms) in each tree (TRC), the corresponding selection elements in each non-shared level (TRCm) of the trees of each set being controlled by different first selection signals (Ym0-Ym3).
A memory device (100) with a control code including a matrix (105) of memory cells (Mfg) grouped into pages to each one a block of control information is associated, a plurality of reading elements (SA0-SA7) for reading a plurality of pages in parallel and the decoding structure (110c) according to any claim from 1 to 7.
Dependencies are inferred from the claim text.