Method for avoiding the ion penetration with the plasma doping
AssigneeMacronix International Co., Ltd.
InventorWei-Wen Chen
Life of this patent
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Abstract
First of all, a semiconductor substrate is provided. Then a gate oxide layer having an uniform thickness is formed on the semiconductor substrate by way of using thermal oxidation. Subsequently, a doping layer is formed on the gate oxide layer by a plasma doped process. Next, forming a poly-layer on the doping layer of the gate oxide layer, wherein the poly-layer has an ions-distribution. Afterward, defining the poly-layer to form a poly-gate. The P-type ions are then implanted into the poly-gate and the substrate by way of using a self-aligned process. Finally, performing a thermal annealing process to form a uniform ion-implanting region and a poly-gate having a lower contact-resistance.
Claims32
A method for doping a dielectric layer, said method comprising:
- providing a substrate;
- forming a dielectric layer on said substrate;
- and
- performing a plasma doping process to form a doping layer on said dielectric layer.
A method for forming a gate, said method comprising:
- providing a substrate;
- forming a dielectric layer on said substrate;
- performing a plasma doping process to form an absorbed layer on said dielectric layer;
- forming an ion-barrier layer in said absorbed layer;
- and
- forming and defining a gate on said ion-barrier layer.
A method for forming a gate, said method comprising:
- providing a substrate;
- forming a dielectric layer on said substrate;
- performing a plasma doping process to form an absorbed layer on said dielectric layer;
- forming a first conductor layer to react with said absorbed layer, so as to form a second conductor layer having an absorbed-ions distribution on said dielectric layer;
- and
- forming and defining said second conductor layer to form a gate having said absorbed-ions distribution on said dielectric layer on said dielectric layer.
A method for forming a gate, said method comprising:
- providing a silicon substrate;
- forming an oxide layer on said silicon substrate;
- performing a pulsed plasma doping process to absorb an nitrogen on said oxide layer;
- forming an ion-barrier layer on said oxide layer by way of using a thermal oxidation process;
- forming and defining a gate on said ion-barrier layer;
- and
- forming an ion-doping region in said gate and an ion-doping region in said silicon substrate.
A method for forming a gate, said method comprising:
- providing a silicon substrate;
- forming an oxide layer on said silicon substrate;
- performing a pulsed plasma doping process to form an nitrogen-absorbed layer on said oxide layer;
- forming a first conductor layer to react with said nitrogen-absorbed layer, so as to form a second conductor layer having an ions-absorbed distribution on said oxide layer;
- defining said second conductor layer to form a gate having said ions-absorbed distribution on said oxide layer;
- and
- forming an ion-doping region in said gate and an ion-doping region in said silicon substrate by way of using an implanting process.
A method for forming a gate, said method comprising:
- providing a silicon substrate;
- forming a gate oxide layer on said silicon substrate;
- performing a pulsed plasma doping process having an energy about 200 eV to 10000 eV to absorb an nitrogen on said gate oxide layer;
- forming an silicon nitride oxide layer on said gate oxide layer by way of using a thermal oxidation process;
- forming and defining a gate on said silicon nitride oxide layer;
- and
- forming a doping region of boron in said gate and a doping region of boron in said silicon substrate.
A method for forming a gate, said method comprising:
- providing a silicon substrate;
- forming a gate oxide layer on said silicon substrate;
- performing a pulsed plasma doping process having an energy about 200 eV to 10000 eV to form an nitrogen-absorbed layer on said gate oxide layer;
- forming a first conductor layer to react with said nitrogen-absorbed layer, so as to form a second conductor layer having an silicon nitride on said gate oxide layer;
- defining said second conductor layer to form a gate having said silicon nitride distribution on said gate oxide layer;
- and
- forming a doping region of boron in said gate and a doping region of boron in said silicon substrate by way of using an implanting process.
Dependencies are inferred from the claim text.