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US 2003/0148599 A1Published application
Method for bumped die and wire bonded board-on-chip package
AssigneeMicron Technology, Inc.
InventorLarry D. Kinsman
Life of this patent
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AssigneeMicron Technology, Inc.
InventorLarry D. Kinsman
Estimating the term…
A method and apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface with at least one opening therethrough. The die includes an active surface and a back surface, wherein the die is attached facedown to the first surface of the carrier substrate with conductive bumps therebetween. In addition, a plurality of bond wires is attached through the at least one opening in the carrier substrate between the active surface of the die and the second surface of the carrier substrate. With this arrangement, both the conductive bumps and the bond wires share in the electrical interconnection between the die and the carrier substrate, thereby allowing more space for bond pads to interconnect with bond wires and/or allowing for smaller die sizes.
A fabrication method for a semiconductor assembly having a substrate having a first surface, a second surface and at least one opening therethrough, said at least one opening in said substrate extending from said first surface to said second surface of said substrate and having a semiconductor die having an active surface and a back surface, said method comprising:
A bond wiring method for interconnecting a semiconductor die having an active surface with conductive bumps thereon to a carrier substrate having a first surface, a second surface and at least one opening therethrough, said at least one opening in said substrate extending from said first surface to said second surface of said substrate, said semiconductor die attached to said first surface of said substrate having said conductive bumps located therebetween, the method comprising:
Dependencies are inferred from the claim text.