Methods for dicing wafer stacks to provide access to interior structures
AssigneeHewlett-Packard Development Company, L.P.
InventorsPeter G. Hartwell, David Horsley, Storrs T. Hoen, Jonah A. Harley
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Abstract
Methods for dicing wafer stacks are provided. Preferably, the method includes the steps of: (1) providing a wafer stack having a first wafer and a second wafer; (2) exposing a portion of the first wafer by removing a portion of the second wafer; and (3) dicing the exposed portion of the first wafer such that a first die assembly is at least partially separated from the wafer stack. Wafer stacks and die assemblies also are provided.
Claims20
A method for producing a die assembly comprising the steps of:
- providing a wafer stack defining a plurality of die assemblies, the wafer stack having a first wafer and a second wafer, a first die assembly of the plurality of die assemblies being formed of at least a portion of the first wafer and at least a portion of the second wafer;
- exposing a portion of the first wafer by removing a portion of the second wafer;
- and
- dicing the exposed portion of the first wafer such that the first die assembly is at least partially separated from the wafer stack.
A wafer stack defining a plurality of die assemblies, said wafer stack comprising:
- a first wafer including a first component;
- and
- a second wafer arranged in an overlying relationship with said first wafer, said second wafer being bonded to said first wafer, said first component being arranged adjacent to said second wafer, said second wafer defining a recessed portion, said recessed portion being arranged in an overlying relationship with said first component, said recessed portion being configured to enable a partial through-cut of said second wafer in a vicinity of said recessed portion such that said first component is not damaged during formation of the partial through-cut;
- wherein a first die assembly of the plurality of die assemblies is defined by at least a portion of said first wafer and at least a portion of said second wafer.
A wafer stack defining a plurality of die assemblies, said wafer stack comprising:
- a first wafer including a first component;
- and
- a second wafer arranged in an overlying relationship with said first wafer, said second wafer being bonded to said first wafer, said first component being arranged adjacent to said second wafer;
- said first wafer and said second wafer defining a gap therebetween, said gap being arranged in an overlying relationship with said first component, said gap being configured to enable a partial through-cut of said second wafer in a vicinity of said gap such that said first component is not damaged during formation of the partial through-cut;
- wherein a first die assembly of the plurality of die assemblies is defined by at least a portion of said first wafer and at least a portion of said second wafer.
Dependencies are inferred from the claim text.