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US 2003/0148547 A1Published application
Method for fault analysis in wafer production
AssigneeInfineon Technologies AG
InventorGerhard Poeppel
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Abstract
With the aid of the method for fault analysis according to the invention, a wide variety of chips are mapped by means of a transformation onto at least one uniform comparable wafer map. This transformation or resealing enables a chip-area-independent assessment of the products or the fabrication processes. The method for fault analysis according to the invention furthermore has the advantage that the information thus obtained can be stored very compactly in corresponding wafer databases and is thus available for further evaluations.
Claims15
A method for fault analysis in wafer production, comprising:
- a) providing at least one wafer with a multiplicity of chips;
- b) examining the chips at least with regard to one or more properties, thereby producing results;
- c) transferring the results to at least one standard wafer with a predetermined number of standard chips which each have a predetermined size;
- d) evaluating the transferred results;
- and
- e) providing evaluated transferred results for at least one of storage in a wafer database and identification of or determining a cause of deficits.
3 more elements
Dependencies are inferred from the claim text.