Circuit for detecting a center level of a FSK demodulated signal to correct same
AssigneeGeneral Research of Electronics, Inc.
InventorKazuo Kawai
Life of this patent
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AssigneeGeneral Research of Electronics, Inc.
InventorKazuo Kawai
Estimating the term…
In demodulation of a FSK signal, a circuit for detecting a center level of said signal and correcting an error thereof is provided. Said circuit can accomplish the detection of the center level correctly always even if there exist cords with various lengths in a length of “1” or “0” of a synchronizing signal at beginning of communication and during communication, and yet frequency variation happens at that time. Said circuit has sample hold circuits SH1 and SH2 each of which are provided so as to correspond to “1” and “0” of an input demodulated data signal. In said circuit a center level value is an average value of voltages held in said sample hold circuits when said signal changes from “1” to “0” or “0” to “1” and a center level value is obtained by adding or subtracting a voltage of ½ of difference between two hold voltages held in another sample hold circuit SH3 to or from a hold voltage in a receiving side at present time when said signal keeps “1” or “0” continuously. Data information is judged by a compartor of which a reference value is anyone of said two center level value.
A circuit for detecting a center level of a FSK demodulated signal to correct same comprising:
Dependencies are inferred from the claim text.