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US 2003/0147292 A1Published application
Memory device having programmable column segmentation to increase flexibility in bit repair
AssigneeMicron Technology, Inc.
InventorsBrian J. Ladner, Daniel B. Penney
Life of this patent
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Abstract
A method and apparatus for programmable column segmentation of a memory device is disclosed. The method and apparatus provide different programmable selected column segmentation arrangements to provide more flexibility in primary column repair of a memory device.
Claims37
A programmable circuit for column repair of a memory device, said circuit comprising:
- an input circuit for receiving an input signal having two possible states, said input circuit generating at least one control signal which changes in response to the state of said input signal;
- a first switching circuit coupled to said input circuit, said switching circuit receiving a plurality of bits of a presented row address signal and selecting at least one of said bits in response to said at least one control signal;
- and
- a circuit for selecting if a defective column address associated with a column segment defined in part by said selected one bit, said determining circuit using the at least one bit of said presented row address signal selected by said first switching circuit to select said defective column address.
1 more element
A column segmentation circuit for a memory device, said circuit comprising:
- a programmable circuit for programming (1) a defective column address associated with a column segment of a first column segmentation pattern, and (2) a defective column address associated with a column segment of a second column segmentation pattern;
- a programmable selection circuit for selecting one of said first and second segmentation patterns;
- a switch circuit responsive to a selected segment of a selected segmentation pattern for selecting a defective column address associated with a selected segment of said selected segmentation pattern;
- and
- a comparator for comparing said selected defective column address with a presented column address to determine if a redundant column should be selected.
2 more elements
A segmentation circuit for programmably segmenting at least one of a row and a column of memory cells of a memory device, said segmentation circuit comprising;
- a programmable device which is selectively programmable to identify one of at least two different segmentation patterns;
- and
- a circuit for segmenting at least one of a row and a column of memory cells of a memory device in accordance with a segmentation pattern programmed at said programmable device.
A column repair circuit for a memory device comprising:
- a decoder circuit for receiving predetermined bits of a presented row address;
- a selection circuit for selecting which predetermined bits of a presented row address are received by said decoder circuit;
- a programmable circuit for programming defective column addresses associated with defective memory cells of said memory device;
- a switching circuit responsive to the output of said decoder for selecting a defective column address from said programmable circuit;
- and
- a comparator for comparing a selected defective column address with a presented column address and indicating whether they match.
3 more elements
A processor system comprising:
- a processor;
- and
- a memory device coupled to said processor, said memory device comprising a programmable circuit for column repair of a memory device, said circuit comprising:
- an input circuit for receiving an input signal having two possible states, said input circuit generating at least one control signal which changes in response to the state of said input signal;
- a first switching circuit coupled to said input circuit, said switching circuit receiving a plurality of bits of a presented row address signal and selecting at least one of said bits in response to said at least one control signal;
- and
- a circuit for selecting if a defective column address associated with a column segment defined in part by said selected one bit, said determining circuit using the at least one bit of said presented row address signal selected by said first switching circuit to select said defective column address.
4 more elements
18 The system of claim 16 wherein said input circuit includes a fuse, said fuse selectively providing one of a high and low voltage signal to said first switching circuit based upon a programmed state of said fuse.
A processor system comprising:
- a processor;
- and
- a memory device coupled to said processor, said memory device comprising a column segmentation circuit, said circuit comprising:
- a programmable circuit for programming (1) a defective column address associated with a column segment of a first column segmentation pattern, and (2) a defective column address associated with a column segment of a second column segmentation pattern;
- a programmable selection circuit for selecting one of said first and second segmentation patterns;
- a switch circuit responsive to a selected segment of a selected segmentation pattern for selecting a defective column address associated with a selected segment of said selected segmentation pattern;
- and
- a comparator for comparing said selected defective column address with a presented column address to determine if a redundant column should be selected.
5 more elements
A processor system comprising:
- a processor;
- and
- a memory device coupled to said processor, said memory device comprising a segmentation circuit for segmenting at least one of a row and a column of memory cells, said segmentation circuit comprising:
- a programmable device which is selectively programmable to identify one of at least two different segmentation patterns;
- and
- a circuit for segmenting at least one of a row and a column of memory cells of a memory device in accordance with a segmentation pattern programmed at said programmable device.
3 more elements
A processing system comprising:
- a decoder circuit for receiving predetermined bits of a presented row address;
- a selection circuit for selecting which predetermined bits of a presented row address are received by said decoder circuit;
- a programmable circuit for programming defective column addresses associated with defective memory cells of said memory device;
- a switching circuit responsive to the output of said decoder for selecting a defective column address from said programmable circuit;
- and
- a comparator for comparing a selected defective column address with a presented column address and indicating whether they match.
3 more elements
A column segmentation circuit for a memory device, said circuit comprising:
- a column segmentation circuit for receiving predetermined bits of a wordline address and using said predetermined bits to determine a column segmentation arrangement;
- and
- a selection circuit for determining which of a plurality of possible wordline address bits are used by said segmentation circuit to determine said column segmentation arrangement.
A method for repairing out defective memory cells of a memory device, said method comprising:
- selecting one of a plurality of available column segmentation patterns for said memory device;
- using said selected segmentation pattern when a row address is presented to select a stored column address associated with said row address and selected segmentation pattern;
- and
- comparing said selected column address with a presented column address to determine if a redundant column address should be used for a memory operation.
1 more element
A method of selecting column segmentation arrangements for a memory device employing redundant columns, said method comprising:
- programming said memory device to define one of a plurality of available column segmentation arrangements for said memory device;
- and
- using said defined column segmentation arrangement to repair defective column segments of said memory device.
Dependencies are inferred from the claim text.