Flat panel display and method of manufacturing the same
AssigneeFujitsu Limited
InventorNobuo Sasaki
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AssigneeFujitsu Limited
InventorNobuo Sasaki
Estimating the term…
The invention provides a flat panel display and a method of manufacturing the same in which the throughput of polycrystallization can be improved in polycrystallizing an amorphous silicon layer formed on a substrate using a low temperature polysilicon manufacturing process. Four gate bus lines are concentrated in the vicinity of a predetermined range indicated by the vertical arrow. The range resides in the vicinity of the boundary between pixels in the second row and pixels in the third row and substantially equally extend across those groups of pixels. Four each of the plurality of gate bus lines and TFT's are combined into a set in the order of row numbers, and at least the TFT's are concentrated in respective ranges X that extend substantially in the middle of respective groups of pixels each consisting of four rows.
A flat panel display having a plurality of switching elements and pixels,
A method of manufacturing a flat panel display in which a semiconductor layer is crystallized to form a plurality of channel regions for a plurality of switching elements, the method comprising the steps of:
Dependencies are inferred from the claim text.