Apparatus and method of manufacture for time delay signals
OwnerJeffrey C. Merrillinventor
Life of this patent
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Abstract
A circuit element that increases time delay in the propagation of an electromagnetic signal includes a plurality of conductors and bends, the conductors mounted with a gap and in parallel to one another, for generating a time delayed signal. The conductors have a first line width, length, and thickness for generating an impedance. The second end of a conductor is connected to the first end of a following conductor by a bend wherein the bend has a second line width, radius and thickness for electrically connecting said conductors in a series circuit. The conductors and bends are surface etched.
Claims37
A circuit that increases time delay in the propagation of an electromagnetic signal, comprising:
- a plurality of conductors and bends, said conductors having a first linewidth, thickness, and length for generating an image impedance, said bends having a second linewidth, radius and thickness for electrically connecting said conductors in a series circuit;
- and
- an end of one of said conductors is connected to an end of a following said conductor by a bend, wherein said conductors and bends are printed to form a gap between adjacent conductors and whereby an electromagnetic signal passing through said circuit comprises a time delayed signal.
A method of manufacturing a circuit that increases time delay in the propagation of an electromagnetic signal, comprising:
- positioning a plurality of conductors and bends, said conductors having a first linewidth, thickness and length for generating an image impedance and said bends having a second linewidth, radius and thickness for electrically connecting said conductors in a series circuit, wherein an end of one of said conductors is connected to an end of a following said conductor by a bend and wherein said conductors and bends are etched to form a gap between adjacent conductors and whereby an electromagnetic signal passing through said circuit comprises a time delayed signal.
31 The method of manufacturing a circuit as claimed in claim 27, wherein said multilayer structure is fused together.
Dependencies are inferred from the claim text.