Differential charge pump circuit

A differential charge pump circuit for eliminating influence of mismatches between current sources, the differential charge pump circuit comprising:

• a capacitor for providing an output voltage and having a first terminal and a second terminal;
• a first current source for providing a first current;
• a first switch connected between said first current source and the first terminal of said capacitor, said first switch being turned ON when a comparison signal is a first level;
• a second current source for providing a second current;
• a second switch connected between the second terminal of said capacitor and said second current source, said second switch being turned ON when the comparison signal is the first level;
• a third switch connected between said first current source and the second terminal of said capacitor, said third switch being turned ON when the comparison signal is a second level;
• a fourth switch connected between the first terminal of said capacitor and said second current source, said fourth switch being turned ON when the comparison signal is the second level;
• a first-common-mode current source being connected to said first current source for providing a first common mode current;
• a second-common-mode current source being connected to said second current source for providing a second common mode current;
• and
• a third-common-mode current source connected in parallel with said first current source for providing a third common mode current.

A differential charge pump circuit for eliminating influence of mismatches between current sources, the differential charge pulp circuit comprising:

• a capacitor for providing an output voltage and having a first terminal and a second terminal;
• a first current source for providing a first current;
• a first switch connected between said first current source and the first terminal of said capacitor, said first switch being turned ON when a comparison signal is a first level;
• a second current source for providing a second current;
• a second switch connected between the second terminal of said capacitor and said second current source, said second switch being turned ON when the comparison signal is the first level;
• a third switch connected between said first current source and the second terminal of said capacitor, said third switch being turned ON when the comparison signal is a second level;
• a fourth switch connected between the first terminal of said capacitor and said second current source, said fourth switch being turned ON when the comparison signal is the second level;
• and
• a common mode current source being connected to said first current source for providing a common mode current.