Circuit and method for determining the location of defect in a circuit
AssigneeLogicVision, Inc.
InventorStephen K. Sunter
Life of this patent
Estimating the term…
Abstract
A method for testing an integrated circuit (IC) for open defects in a printed wire connected to an IC pin of the IC, the method comprises measuring the capacitance of the IC pin; and comparing the value of the measured capacitance to an expected IC pin capacitance value for the pin unconnected, and determining that an open defect exists proximate the pin when the measured capacitance is less than a predetermined value based on the expected IC pin capacitance value.
Claims19
A circuit for determining the length of a printed wire connected to an IC pin, the circuit comprising:
- a stimulus signal generator;
- circuitry for conveying an output of the stimulus signal generator to the IC pin;
- a response signal monitor;
- circuitry for conveying a signal from the IC pin to the response signal monitor;
- and
- means for comparing a signal value received by the signal monitor to a value that is based on the expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin and the expected capacitance of the printed circuit wire per unit length.
A circuit for determining the length of a printed wire connected to an IC pin, the circuit comprising:
- equipment for measuring capacitance;
- analog buses for conveying input and output signals of the equipment to the IC pin through the IC;
- means for comparing a measured capacitance of the IC pin to an expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin plus the expected capacitance of the printed circuit wire per unit length.
A circuit for determining whether printed wire is connected to an IC pin, the circuit comprising:
- equipment for measuring capacitance;
- analog buses for conveying input and output signals of the equipment to the IC pin, through the IC;
- and
- means for comparing the measured capacitance of the IC pin to an expected capacitance of the IC pin without any printed wire capacitance connected to the IC pin.
A method for testing an integrated circuit (IC) for open defects in a printed wire connected to an IC pin of the IC, the method comprising:
- measuring the capacitance of the IC pin;
- and
- comparing the value of the measured capacitance to an expected IC pin capacitance value for the pin unconnected, and determining that an open defect exists proximate the pin when the measured capacitance is less than a predetermined value based on said expected IC pin capacitance.
Dependencies are inferred from the claim text.