Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects
AssigneeAdvanced Micro Devices, Inc.
InventorsKai Yang, Kashmir S. Sahota, Steven C. Avanzino
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AssigneeAdvanced Micro Devices, Inc.
InventorsKai Yang, Kashmir S. Sahota, Steven C. Avanzino
Estimating the term…
An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening. A conductor core fills the opening over the barrier layer. By using a polishing solution having a high selectivity from the conductor core to the barrier layer in conjunction with a grooved polyurethane polish pad, a very thin barrier layer may be used without the conductor core and dielectric layer being subject to erosion and the conductor core being subject to dishing.
An integrated circuit comprising:
An integrated circuit comprising:
A method of manufacturing an integrated circuit comprising:
A method of manufacturing an integrated circuit comprising:
Dependencies are inferred from the claim text.