Package for semiconductor device with ground lead connection having high stress resistance
AssigneeSTMicroelectronics S.r.l.
InventorsBattista Vitali, Roberto Tiziani, Loic Renard
Life of this patent
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Abstract
A package for a semiconductor device, comprising a leadframe on which at least one semiconductor chip is arranged, the semiconductor chip being connected to the leadframe by conducting leads and at least one ground lead; the ground lead is connected between the top of the semiconductor chip and a recessed region of the leadframe.
Claims10
A package for a semiconductor device, comprising a leadframe on which at least one semiconductor chip is arranged, said semiconductor chip being connected to said leadframe by means of conducting leads and at least one ground lead, wherein said ground lead is connected between the top of said semiconductor chip and a recessed region of said leadframe.
A package for a semiconductor device, comprising a leadframe on which at least one semiconductor chip is arranged, said semiconductor chip being connected to said leadframe by means of conducting leads and by means of at least one ground lead, wherein said conducting leads and said at least one ground lead are connected at recessed regions of said leadframe.
Dependencies are inferred from the claim text.