Back to results
US 2003/0146495 A1Published application
Semiconductor device and method for fabricating the same
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsEiji Tamaoka, Hideo Nakagawa
Life of this patent
Estimating the term…
Abstract
A semiconductor device of this invention includes a first interconnect pattern formed on a semiconductor substrate and a second interconnect pattern formed above the first interconnect pattern with an interlayer insulating film sandwiched therebetween. The first interconnect pattern includes a dummy pattern insulated from the first interconnect pattern, and the dummy pattern includes a plurality of fine patterns adjacent to each other and air gaps formed between the adjacent fine patterns.
Claims6
A method far fabricating a semiconductor device comprising:
- a first step of forming a first interconnect pattern forming layer from a conducting film on a semiconductor substrate and a first insulating film on said first interconnect pattern forming layer;
- a second step of forming a plug electrically connected to said first interconnect pattern forming layer by forming an opening in said first insulating film by selective etching and filling said opening with a conducting film;
- a third step of forming a resist pattern corresponding to a first interconnect pattern including a dummy pattern from a resist film applied over said semiconductor substrate including said plug;
- a fourth step of patterning said first insulating film by etching said first insulating film with said resist pattern and said plug used as a mask;
- a fifth step of forming, from said first interconnect pattern forming layer, said first interconnect pattern and said dummy pattern that is electrically insulated from said first interconnect pattern and includes a plurality of fine patterns adjacent to each other by etching said first interconnect pattern forming layer with said resist pattern and said plug used as a mask;
- a sixth step of forming, on said semiconductor substrate, a second insulating film covering said plug, said first interconnect pattern and said dummy pattern so as to form air gaps between patterns of said first interconnect pattern and between said fine patterns of said dummy pattern;
- and
- a seventh step of planarizing a top face of said second insulating film until said plug is exposed and forming, on said second insulating film, a second interconnect pattern electrically connected to said plug after planarization.
5 more elements
A method for fabricating a semiconductor device comprising:
- a first step of forming a first interconnect pattern forming layer of a conducting film on a semiconductor substrate;
- a second step of forming a resist pattern corresponding to a. first interconnect pattern including a dummy pattern from a resist film applied over said semiconductor substrate;
- a third step of forming, from said first interconnect pattern forming layer, said first interconnect pattern and said dummy pattern that is electrically insulated from said first interconnect pattern and includes a plurality of fine patterns adjacent to each other by etching said first interconnect pattern forming layer with said resist pattern used as a mask;
- a fourth step of forming, on said semiconductor substrate, an insulating film covering said first interconnect pattern and said dummy pattern so as to form air gaps between said fine patterns of said dummy pattern;
- a fifth step of planarizing a top face of said insulating film and forming a plug electrically connected to said first interconnect pattern by forming an opening in said insulating film after planarization by selective etching and filling said opening with a conducting film;
- and
- a sixth step of forming, on said insulating film, a second interconnect pattern electrically connected to said plug.
4 more elements
A method for fabricating a semiconductor device comprising:
- a first step of forming a first interconnect pattern forming layer on a substrate, and a first insulating film on said first interconnect pattern forming layer;
- a second step of forming an opening in said first insulating film, and forming a plug electrically connected to said first interconnect pattern forming layer;
- after said second step, a third step of forming a first interconnect pattern and a dummy pattern from a laminated film composed of said first interconnect pattern forming layer and said first insulating film;
- after said third step, a fourth step of forming a second insulating film such that an air gap is provided between each said first interconnect pattern and between each said dummy pattern;
- and
- a fifth step of planarizing a top face of said second insulating film until said plug is exposed and forming, on said second insulating film, a second interconnect pattern electrically connected to said plug,
- wherein said dummy pattern is composed of a plurality of fine patterns adjacent to each other, and is electrically insulated from said first interconnect pattern.
4 more elements
A method for fabricating a semiconductor device comprising:
- a first step of forming a first interconnect pattern forming layer on a substrate;
- after said first step, a second step of forming a first interconnect pattern and a dummy pattern from said first interconnect pattern farming layer;
- after said second step, a third step of forming a second insulating film such that an air gap is provided between each said first interconnect pattern and between each said dummy pattern;
- a fourth step of planarizing a top face at said second insulating film and farming an opening in said second insulating film, thereafter forming a plug electrically connected to said first interconnect pattern in said opening;
- and
- a fifth step of forming a second interconnect pattern electrically connected to said plug,
- wherein said dummy pattern is composed of a plurality of fine patterns adjacent to each other, and is electrically insulated from said first interconnect pattern.
4 more elements
Dependencies are inferred from the claim text.