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US 2003/0146486 A1Published application
Semiconductor device
AssigneeNEC Electronics Corporation
InventorMasahiro Ikeda
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AssigneeNEC Electronics Corporation
InventorMasahiro Ikeda
Estimating the term…
In the semiconductor device according to the present invention having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of the function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from the first function macro is formed, each function macro formation region has an element formation region where an element is formed, a plurality of dummy semiconductor regions where no element is formed and isolation trenches filled with a predetermined insulating material mutually isolating between the plurality of dummy semiconductor regions, and the dummy semiconductor region in one function macro formation region has mutually identical plane shape and identical area and the area of the first dummy semiconductor region included in the first function macro formation region and the area of the second dummy semiconductor region included in the second function macro formation region are different.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation regions has an element formation region where an element is formed, a plurality of dummy semiconductor regions where no element is formed and isolation trenches which isolate mutually between said element formation region and the plurality of dummy semiconductor regions, said dummy semiconductor regions in said function macro formation region have mutually identical plane shape and identical area, and the area of the first dummy semiconductor region included in said first function macro formation region and the area of the second dummy semiconductor region included in said second function macro formation region are different.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation regions has an element formation region, where an element is formed, a plurality of dummy semiconductor regions where no element is formed and isolation trenches filled with a predetermined insulating material which mutually isolate between said element formation region and the plurality of said dummy semiconductor regions, and in the plurality of said function macro formation regions, the plane shape and area of said dummy semiconductor regions are constant, and the adjacent dummy space of said dummy semiconductor regions mutually adjacent via said isolation trenches is different in said first function macro formation region and in said second function macro formation region.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed, and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation region has an element formation region where an element is formed, a plurality of dummy semiconductor regions where no element is formed and isolation trenches filled with a predetermined isolating material mutually isolating between said element formation region and the plurality of said dummy semiconductor regions, said dummy semiconductor regions in one of said function macro formation regions have mutually identical plane shape and identical area and the adjacent dummy space of said dummy semiconductor regions mutually adjacent via said isolation trenches is constant within the function macro formation region, and when the area of the first dummy semiconductor region and said adjacent dummy space included in said first function macro formation region are called S1 μm2 and D1 μm, respectively, and the area of the second dummy semiconductor region and said adjacent dummy space included in said second function macro formation region are called S2 μm2and D2 μm, respectively, these quantities satisfy the relation (S1−S2)2+(D1−D2)2≠0.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation region has an element formation region where an element is formed, a plurality of dummy semiconductor regions where no element is formed and isolation trenches filled with a predetermined insulating material for mutually isolating between said element formation region and the plurality of dummy semiconductor regions, said dummy semiconductor region in one of said function macro formation regions has mutually identical plane shape and identical area and the adjacent dummy space of said dummy semiconductor regions mutually adjacent via said isolation trenches is constant within the function macro formation region, and when the area of the first dummy semiconductor region and the distance between said adjacent dummy centers included in said first function macro formation region are called S1 μm2 and Z1 μm, respectively, and when the area of the second dummy semiconductor region and the distance between said adjacent dummy centers included in said second function macro formation region are called S2 μm2and Z2 μm, respectively, these quantities satisfy the following relation (S1−S2)2+(Z1−Z2)2≠0.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed, and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation regions has a normal wiring connected to an element formed on said semiconductor substrate and a plurality of dummy wirings which are not connected to said element and a predetermined insulating film deposited on said normal wiring and said dummy wirings, the plurality of said dummy wirings included in one of said function macro formation regions have mutually identical plane shape and identical area, and the area of a first dummy wiring included in said first function macro formation region and the area of a second dummy wiring included in said second function-macro formation region are different.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro which is different from said first function macro is formed, each of said function macro formation region has a normal wiring connected to an element formed on said semiconductor substrate and a plurality of dummy wirings which are not connected to said element and a predetermined insulating film deposited on said normal wiring and said dummy wirings, the plurality of said dummy wirings included in the plurality of said function macro formation regions have mutually identical plane shape and identical area and the adjacent dummy space of said dummy wirings mutually adjacent via said isolation trenches is different in said first function macro formation region and in said second function macro formation region.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from said first function macro is formed, each of said function macro formation regions has a normal wiring connected to an element formed on said semiconductor substrate, a plurality of dummy wirings not connected to said element and a predetermined insulating film deposited on said dummy wirings, the plurality of said dummy wirings included in each one of said function macro formation region have mutually identical plane shape and identical area and the adjacent dummy space of said dummy wirings mutually adjacent via said insulating film is constant within the function macro formation region, and when the area of the first dummy wiring and said adjacent dummy space included in said first function macro formation region are called S1 μm2 and D1 μm, respectively, and when the area of the second dummy wiring and said adjacent dummy space included in said second function macro formation region are called S2 μm2 and D2 μm, respectively, these quantities satisfy the relation (S1−S2)2+(D1−D2)2≠0.
A semiconductor device having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of said function macro formation regions include at least a first function macro formation region where a first function macro is formed and a second function macro formation region where a second function macro different from sad first function macro is formed, each of said function macro formation region has a normal wiring connected to an element formed on said semiconductor substrate, a plurality of dummy, wirings not connected to said element and a predetermined insulating film deposited on said dummy wirings, the plurality of said dummy wirings included in one of said function macro formation regions have mutually identical plane shape and identical area and the distance between adjacent dummy centers of said dummy wirings mutually adjacent via said insulating film is constant within the function macro formation region, and when the area of the first dummy wiring and the distance between said adjacent dummy centers included in said first function macro formation region are called S1 μm2 and Z1 μm, respectively, and when the area of the second dummy wiring and the distance between said adjacent dummy centers included in said second function macro formation region are called S2 μm2and Z2 μm, respectively, these quantities satisfy the relation (S1−S2)2+(Z1−Z2)2≠0.
Dependencies are inferred from the claim text.