MOSFET gate electrodes having performance tuned work functions and methods of making same
AssigneeIntel Corporation
InventorsJohn P. Barnak, Robert S. Chau, Chunlin Liang
Life of this patent
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Abstract
An insulated gate field effect transistor (FET) of a particular conductivity type, has as a gate electrode, a non-semiconductive material with a work function that approximates the work function of a semiconductive material that is doped to be of the same conductivity type. In a particular embodiment, an integrated circuit includes an n-channel FET having a tantalum-based gate electrode with a work function approximately the same as n-doped polysilicon, and a p-channel FET has a tantalum nitride-based gate electrode with a work function approximately the same as p-doped polysilicon.
Claims27
A FET of a first conductivity type, comprising:
- a source terminal;
- a drain terminal;
- a gate insulator;
- and
- a gate electrode comprising a metal having a work function approximately equal to the work function of polysilicon doped with a first conductivity type dopant.
An integrated circuit, comprising:
- a substrate;
- a first FET of a first conductivity type formed on the substrate;
- and
- a second FET of a second conductivity type formed on the substrate;
- wherein the first FET has a first metal gate electrode, the second FET has a second metal gate electrode, and the first and second metal gate electrodes have different work functions.
A method of making complementary FETs, comprising:
- forming a first doped region of a first conductivity type in a substrate;
- forming a second doped region of a second conductivity type in the substrate;
- forming a gate insulator layer over the first and second doped regions;
- depositing a layer of metal over the gate insulator layer, the metal having a first work function;
- modifying a portion of the metal layer such that the modified portion has a second work function;
- patterning the metal layer to form gate electrodes;
- and
- forming source/drain junctions aligned to the gate electrodes.
A method of making complementary FETs, comprising:
- forming a first doped region of a first conductivity type in a substrate;
- forming a second doped region of a second conductivity type in the substrate;
- forming a gate insulator layer over the first and second doped regions;
- depositing a layer of metal over the gate insulator layer, the metal having a first work function;
- patterning the metal layer to form gate electrodes;
- modifying, after patterning, a portion of the metal layer such that the modified portion has a second work function;
- and
- forming source/drain junctions aligned to the gate electrodes.
Dependencies are inferred from the claim text.