MOS device with dual gate insulators and method of forming the same
AssigneeSilicon Integrated Systems Corp.
InventorsWen Ping Yen, Yun Hsiu Chen, Hung-Cheng Weng
Life of this patent
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Abstract
A MOS device with dual gate insulators has a first gate insulator formed on a predetermined area of a semiconductor substrate, and a second gate insulator formed outside the predetermined area of the semiconductor substrate to surround the first gate insulator. The second gate insulator is thicker than the first gate insulator. In addition, a gate electrode layer is patterned on the dual gate insulators. The bottom center of the gate electrode layer covers the first gate insulator, and the bottom edge of the gate electrode layer extends to cover the second gate insulator.
Claims13
A MOS device with dual gate insulators, comprising:
- a semiconductor substrate;
- a first gate insulator formed on a predetermined area of the semiconductor substrate;
- a second gate insulator formed outside the predetermined area of the semiconductor substrate to surround the first gate insulator, wherein the second gate insulator is thicker than the first gate insulator;
- and
- a gate electrode layer, wherein the bottom center of the gate electrode layer covers the first gate insulator and the bottom edge of the gate electrode layer extends to cover the second gate insulator.
A method of forming a MOS device with dual gate insulators, comprising steps of:
- providing a semiconductor substrate having a predetermined region;
- forming a first insulator on the predetermined area of the semiconductor substrate;
- forming a second insulator to cover the first insulator and the exposed semiconductor substrate, wherein the second insulator on the predetermined region serves as a thin gate insulator and the stacked structure of the second insulator and the first insulator outside the predetermined region serves as a thick gate insulator;
- and
- forming a gate electrode layer on the second insulator, wherein the bottom center of the gate electrode layer covers the thin gate insulator and the bottom edge of the gate electrode layer extends to cover the thick gate insulator.
Dependencies are inferred from the claim text.