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US 2003/0145313 A1Published application
Enhanced instruction scheduling after register allocation by employing traces
AssigneeSun Microsystems, Inc.
InventorSpiros Kalogeropulos
Life of this patent
Estimating the term…
Abstract
A trace scheduler schedules instructions within a trace and after register allocation. The trace scheduler computes critical path information across the trace, which is used to schedule instructions across basic block boundaries. In this manner, the efficiency of the compiler is maximized.
Claims29
A method comprising:
- allocating registers;
- building a trace comprising basic blocks;
- and
- scheduling instructions within said trace after said allocating registers.
1 more element
A method comprising:
- allocating registers;
- building a trace after said allocating registers, said trace comprising basic blocks comprising instructions;
- building a trace block comprising said instructions;
- scheduling said instructions within said trace block;
- and
- moving said instructions from said trace block to said basic blocks.
3 more elements
A system comprising:
- a processor;
- and
- a memory having a method of scheduling instructions therein, wherein upon execution of said method, said method comprises:
- allocating registers;
- building a trace comprising basic blocks;
- and
- scheduling instructions within said trace after said allocating registers.
4 more elements
A computer system comprising:
- means for allocating registers;
- means for building a trace comprising basic blocks;
- and
- means for scheduling instructions within said trace after said registers are allocated by said means for allocating.
1 more element
A computer program product having a method of scheduling instructions stored therein, wherein upon execution of said method, said method comprises:
- allocating registers;
- building a trace comprising basic blocks;
- and
- scheduling instructions within said trace after said allocating registers.
1 more element
Dependencies are inferred from the claim text.