Finfet layout generation
AssigneeInternational Business Machines Corporation
InventorsDavid M. Fried, William C. Leipold, Edward J. Nowak
Life of this patent
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Abstract
A method and system for generating a set of FinFET shapes. The method and system locate a gate in an FET layout. The set of FinFET shapes is generated coincident with the gate. The method and system can further create a FinFET layout by modifying the FET layout to include the set of FinFET shapes.
Claims21
A method for generating a set of FinFET shapes, comprising:
- locating a gate in an FET layout;
- finding a gate axis of the gate;
- generating the set of FinFET shapes coincident with the gate;
- and
- stretching the set of FinFET shapes perpendicular to the gate axis
A computer program product comprising a computer useable medium having computer readable program code embodied therein for generating a set of FinFET shapes, the program product comprising:
- program code for locating a gate in an FET layout;
- program code for finding a gate axis of the gate;
- program code for generating the set of FinFET shapes coincident with the gate;
- and
- program code for stretching the set of FinFET shapes perpendicular to the gate axis.
A system for generating a set of FinFET shapes, comprising:
- a location system for locating a gate in an FET layout;
- and
- a generation system for generating a set of FinFET shapes coincident with the gate.
Dependencies are inferred from the claim text.