Method and apparatus for improving digital circuit design

A system for designing a digital logic circuit, comprising:

• a processing unit;
• a memory, coupled to said processing unit, to store a computer program;
• wherein said computer program being executable by said processing unit to:
• determine a first arrangement of circuit cells, from a library of circuit cells, for a digital circuit design to minimize the amount of delay in the circuit design, the design including dynamic logic circuits to perform a plurality of logic functions;
• convert the first arrangement of circuit into a second arrangement of circuit cells to minimize the amount of logic circuits connecting one logic stage of the circuit design to another logic stage;
• and
• convert the second arrangement of circuit cells into a third arrangement of circuit cells to minimize the circuit area used for the circuit design.

A machine-readable medium having stored thereon a plurality of executable instructions, the plurality of instructions comprising instructions to:

• determine a first arrangement of circuit cells, from a library of circuit cells, for a digital circuit design to minimize the amount of delay in the circuit design, the design including dynamic logic circuits for performing a plurality of logic functions;
• convert the first arrangement of circuit cells into a second arrangement of circuit cells to minimize the amount of logic circuits connecting one logic stage of the circuit design to another logic stage;
• and
• convert the second arrangement of circuit cells into a third arrangement of circuit cells to minimize the circuit area used for the circuit design.