Method and system for handling multiple bit errors to enhance system reliability

A data processing system for handling a bit error, the system comprising:

• means for identifying the bit error associated with a cache address;
• means for determining a type of the bit error, wherein the type is one of a soft error and a hard error;
• and
• means for performing a cache line deletion operation on the cache address in response to a determination that the type of the bit error is the hard error.

A computer program product in a data processing system for handling a bit error, the product comprising:

• instruction means for identifying the bit error associated with a cache address;
• instruction means for determining a type of the bit error, wherein the type is one of a soft error and a hard error;
• and
• instruction means for performing a cache line deletion operation on the cache address in response to a determination that the type of the bit error is the hard error.

A method in a data processing system for handling a bit error, the method comprising:

• identifying the bit error associated with a cache address;
• detecting a last allowable hard error;
• identifying a defective part;
• and
• logging for part replacement in response to the last allowable hard error.

A method in a data processing system for handling a bit error, the method comprising:

• identifying the bit error associated with a cache address;
• determining a type of the bit error, wherein the type is one of a soft error, a serviceable hard error, and a last allowable hard error;
• performing a purge on the cache address in response to a determination that the type of the bit error is the soft error;
• performing a cache line deletion operation on the cache address in response to a determination that the type of the bit error is the serviceable hard bit error;
• and
• logging for part replacement in response to a determination that the type of the bit error is the last allowable hard bit error.

A method in a data processing system for handling a bit error of a memory system, the method comprising:

• identifying the bit error associated with a memory address;
• determining a type of the bit error, wherein the type is one of a soft error and a hard error;
• and
• performing a line deletion operation on the memory address in response to a determination that the type of the bit error is the hard error.

A method in a data processing system for handling a bit error, the method comprising:

• identifying the bit error associated with a memory address;
• determining a type of the bit error, wherein the type is one of a soft error, a serviceable hard error, and a last allowable hard error;
• performing a purge on the memory address in response to a determination that the type of the bit error is the soft error;
• performing a line deletion operation on the memory address in response to a determination that the type of the bit error is the serviceable hard bit error;
• and
• logging for part replacement in response to a determination that the type of the bit error is the last allowable hard bit error.