Processing architecture, related system and method of operation

A processing system, comprising:

• a processing architecture for executing at least one first set of instructions and one second set of instructions compiled for being executed by a first CPU and by a second CPU, said first set of instructions not being executable by said second CPU and said second set of instructions not being executable by said first CPU, the architecture including:
• a single processor configured for executing both the instructions of said first set and the instructions of said second set, said single processor being selectively switchable at least between one first operating mode, in which said single processor executes said first set of instructions, and one second operating mode, in which said single processor executes said second set of instructions, said single processor being configured for recognizing at least one switching instruction at least between said first operating mode and said second operating mode and for switching between said first operating mode and said second operating mode according to said at least one switching instruction.

A method of using a processing system, the method comprising:

• compiling sets of instructions of at least one first set and at least one second set;
• and
• providing at least one switching instruction at a head of said sets of instructions.

An apparatus, comprising:

• a single processor to execute a first type of instruction associated with a first mode of operation and to execute a second type of instruction associated with a second mode of operation,
• the single processor being selectively switchable between the first and second modes of operation to respectively execute their associated instruction type, and
• the single processor being selectively switchable between the first and second modes of operation based on at least one switching instruction.