Nonvolatile memory and memory card

A nonvolatile memory, comprising:

• a plurality of memory banks having a plurality of erasable and programmable nonvolatile memory cells and capable of access-processing independently respectively,
• wherein the nonvolatile memory has a first write operation mode in which a write instruction command, a write start address and the number of write processing regions with the write start address as a start point are inputted and thereafter write data are capable of being sequentially received by the number of the write processing regions;
• writing to each memory cell is started since the latching of write data for one write processing region in one memory bank;
• and a latch operation at one memory bank and writing to each memory cell at other memory banks can be made parallel.

A nonvolatile memory, comprising:

• a plurality of memory banks having a plurality of erasable and programmable nonvolatile memory cells and capable of access-processing independently respectively,
• wherein the nonvolatile memory has a first read operation mode in which a read instruction command, a read start address and the number of read processing regions with the read start address as a start point are inputted and thereafter data are capable of being read from the plurality of memory banks by the number of the read processing regions and outputted to the outside;
• an external output is started since the latching of data read from each memory cell for one read processing region in the corresponding memory bank;
• and a read and latch operation of data at one memory bank and the output of latch data to the outside at other memory banks can be made parallel.

A memory card, comprising:

• a nonvolatile memory having a plurality of memory banks capable of access-processing independently respectively;
• and
• a memory controller capable of access-controlling the nonvolatile memory,
• said nonvolatile memory and said memory controller being structured on a card substrate,
• wherein the memory controller is capable of outputting write data and a write start command by the number of write processing regions following a first write instruction command, a write start address and the number of the write processing regions with the write start address as a start point, and
• wherein the nonvolatile memory latches write data for one write processing region in one memory bank in response to the first write instruction command and thereafter starts writing thereof to each memory cell in response to the write start command, and makes parallel a latch operation at one memory bank and writing to each memory cell at other memory banks.

A memory card, comprising:

• a nonvolatile memory having a plurality of memory banks capable of access-processing independently respectively;
• and
• a memory controller capable of access-controlling the nonvolatile memory,
• said nonvolatile memory and said memory controller being structured on a card substrate,
• wherein the memory controller is capable of sequentially outputting write data by the number of write processing regions following a first write instruction command, a write start address, and the number of the write processing regions with the write start address as a start point, and
• wherein the nonvolatile memory latches write data for one write processing region in one memory bank in response to the first write instruction command and thereafter starts writing thereof to each memory cell, and makes parallel a latch operation at one memory bank and writing to each memory cell at other memory banks.

A memory card, comprising:

• a nonvolatile memory having a plurality of memory banks capable of access-processing independently respectively;
• and
• a memory controller capable of access-controlling the nonvolatile memory,
• said nonvolatile memory and said memory controller being structured on a card substrate,
• wherein the memory controller is capable of outputting a first read instruction command, a read start address and the number of read processing regions with the read start address as a start point, and
• wherein the nonvolatile memory is capable of reading data from the plurality of memory banks by the number of the read processing regions in response to the first read instruction command and outputting the same to the outside, latching data read from each memory cell for one read processing region at the corresponding memory bank and thereafter starting an external output thereof, and making parallel the operation of reading and latching data at one memory bank, and the external output of latch data at other memory banks.

A memory card, comprising:

• a nonvolatile memory having a plurality of memory banks capable of access-processing independently respectively;
• and
• a memory controller capable of access-controlling the nonvolatile memory,
• said nonvolatile memory and said memory controller being structured on a card substrate,
• wherein the memory controller is capable of outputting a first erase instruction command, an erase start address, and the number of erase processing regions with the erase start address as a start point, and
• wherein the nonvolatile memory is capable of erasing erase processing regions for the plurality of memory banks by the number of the erase processing regions in response to the first erase instruction command and making parallel an erase operation for the corresponding erase processing region at one memory bank, and an erase operation for erase processing regions at other memory banks.