Ingress throttling via adaptive interrupt delay scheduling
OwnerPatrick L. Connor, Daniel R. Gaur +3inventors
InventorsPatrick L. Connor, Daniel R. Gaur, Eric K. Mann, Gary Y. Tsao, Michael C. Gibson
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Abstract
An arrangement is provided for ingress throttling via adaptive interrupt delay scheduling. When packets are received, a receive interrupt is issued with a delay determined based on the backlog information of an associated host, gathered from the number of packets returned from the host after the completion of processing previously delivered packets.
Claims24
A method, comprising:
- receiving at least one packet;
- issuing a receive interrupt with a delay, the delay being determined based on backlog information on a host, to inform the host about the received packets;
- processing, upon receiving the receive interrupt, the received packets.
A method for an input and output controller, comprising:
- receiving at least one packet;
- populating the at least one packet into a packet buffer;
- issuing a receive interrupt with a delay, determined based on backlog information on a host, to inform the host about the received packets;
- and
- sending the received packets to the host.
A system, comprising:
- an input and output controller for receiving packets and for notifying the received packets by sending a receive interrupt with an appropriate delay determined based on backlog information;
- and
- a host for processing the received packets upon intercepting the receive interrupt and for returning processed packets to the input and output controller, from which the backlog information is determined.
An input and output controller, comprising:
- a packet receiver for intercepting at least one packet;
- a packet buffer for storing the received packets;
- and
- a backlog based interrupting mechanism for issuing a receive interrupt with an appropriate delay, computed based on backlog information, to a host.
A machine-accessible medium encoded with data, the data, when accessed, causing:
- receiving at least one packet;
- issuing a receive interrupt with a delay, determined based on backlog information on a host, to inform the host about the received packets;
- processing, upon receiving the receving interrupt, the received packets;
- and
- returning processed packets to an input and output controller.
A machine-accessible medium encoded with data for an input and output controller, the data, when accessed, causing:
- receiving at least one packet;
- populating the at least one packet into a packet buffer;
- issuing a receive interrupt with a delay, determined based on backlog information on a host, to inform the host about the received packets;
- and
- sending the received packets to a host.
Dependencies are inferred from the claim text.