Silicon carbide interconnect for semiconductor components and method of fabrication

An interconnect for testing a semiconductor component comprising:

• a substrate comprising a surface and a plurality of first contacts on the surface configured to electrically engage a plurality of second contacts on the component;
• a plurality of electrically conductive silicon carbide conductive layers covering the first contacts and areas on the surface between adjacent first contacts;
• a plurality of conductors on the surface in electrical communication with the silicon carbide conductive layer.

An interconnect for a semiconductor component comprising:

• a substrate comprising a first surface and a second surface;
• a plurality of first contacts on the first surface configured to electrically engage a plurality of second contacts on the component, the first contacts comprising projections covered with electrically conductive silicon carbide layers configured to penetrate the second contacts, the silicon carbide layers surrounding the projections and covering portions of the first surface proximate to the projections.

An interconnect for a semiconductor component comprising:

• a substrate comprising a first surface and a second surface;
• a plurality of first contacts on the first surface configured to electrically engage a plurality of bumped contacts on the component, the first contacts comprising indentations covered with electrically conductive silicon carbide layers configured to retain the bumped contacts, the silicon carbide layers surrounding the indentations and covering portions of the first surface proximate to the indentations.

A system for testing a semiconductor component comprising:

• a testing apparatus comprising a base for retaining the component and a force applying mechanism attached to the base for applying a biasing force to the component;
• and
• an interconnect on the base comprising a substrate having a surface, and a plurality of first contacts on the surface configured to electrically engage a plurality of second contacts on the component, the first contacts comprising electrically conductive silicon carbide layers surrounding the first contacts and covering portions of the surface.

A system for testing a semiconductor component comprising:

• a testing apparatus comprising a wafer probe handler for applying a biasing force to the component and testing circuitry for applying test signals to the component;
• an interconnect mounted to the wafer probe handler, the interconnect comprising a substrate and a plurality of first contacts on the surface configured to electrically engage a plurality of second contacts on the component, the first contacts comprising electrically conductive silicon carbide layers surrounding the first contacts and covering portions of the surface.

A method for fabricating an interconnect for a semiconductor component comprising:

• providing a substrate comprising a surface;
• forming a plurality of first contacts on the surface configured to electrically engage a plurality of second contacts on the component;
• at least partially covering the first contacts with electrically conductive layers comprising silicon carbide.